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Searched refs:IsFSHL (Results 1 – 6 of 6) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp1674 bool IsFSHL = (Op.getOpcode() == ISD::FSHL); in SimplifyDemandedBits() local
1699 Known2.One <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits()
1700 Known2.Zero <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits()
1701 Known.One.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits()
1702 Known.Zero.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits()
6503 bool IsFSHL = Node->getOpcode() == ISD::FSHL; in expandFunnelShift() local
6509 unsigned RevOpcode = IsFSHL ? ISD::FSHR : ISD::FSHL; in expandFunnelShift()
6521 if (IsFSHL) { in expandFunnelShift()
6543 ShX = DAG.getNode(ISD::SHL, DL, VT, X, IsFSHL ? ShAmt : InvShAmt); in expandFunnelShift()
6544 ShY = DAG.getNode(ISD::SRL, DL, VT, Y, IsFSHL ? InvShAmt : ShAmt); in expandFunnelShift()
[all …]
H A DDAGCombiner.cpp8988 bool IsFSHL = N->getOpcode() == ISD::FSHL; in visitFunnelShift() local
8996 return IsFSHL ? N0 : N1; in visitFunnelShift()
9015 return IsFSHL ? N0 : N1; in visitFunnelShift()
9023 DAG.getConstant(IsFSHL ? BitWidth - ShAmt : ShAmt, in visitFunnelShift()
9027 DAG.getConstant(IsFSHL ? ShAmt : BitWidth - ShAmt, in visitFunnelShift()
9046 IsFSHL ? (((BitWidth - ShAmt) % BitWidth) / 8) : (ShAmt / 8); in visitFunnelShift()
9076 if (IsUndefOrZero(N0) && !IsFSHL && DAG.MaskedValueIsZero(N2, ~ModuloBits)) in visitFunnelShift()
9078 if (IsUndefOrZero(N1) && IsFSHL && DAG.MaskedValueIsZero(N2, ~ModuloBits)) in visitFunnelShift()
9086 unsigned RotOpc = IsFSHL ? ISD::ROTL : ISD::ROTR; in visitFunnelShift()
H A DSelectionDAGBuilder.cpp6447 bool IsFSHL = Intrinsic == Intrinsic::fshl; in visitIntrinsicCall() local
6454 auto RotateOpcode = IsFSHL ? ISD::ROTL : ISD::ROTR; in visitIntrinsicCall()
6457 auto FunnelOpcode = IsFSHL ? ISD::FSHL : ISD::FSHR; in visitIntrinsicCall()
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DLegalizerHelper.cpp5824 const bool IsFSHL = MI.getOpcode() == TargetOpcode::G_FSHL; in lowerFunnelShiftWithInverse() local
5825 unsigned RevOpcode = IsFSHL ? TargetOpcode::G_FSHR : TargetOpcode::G_FSHL; in lowerFunnelShiftWithInverse()
5836 if (IsFSHL) { in lowerFunnelShiftWithInverse()
5862 const bool IsFSHL = MI.getOpcode() == TargetOpcode::G_FSHL; in lowerFunnelShiftAsShifts() local
5875 ShX = MIRBuilder.buildShl(Ty, X, IsFSHL ? ShAmt : InvShAmt).getReg(0); in lowerFunnelShiftAsShifts()
5876 ShY = MIRBuilder.buildLShr(Ty, Y, IsFSHL ? InvShAmt : ShAmt).getReg(0); in lowerFunnelShiftAsShifts()
5894 if (IsFSHL) { in lowerFunnelShiftAsShifts()
5920 bool IsFSHL = MI.getOpcode() == TargetOpcode::G_FSHL; in lowerFunnelShift() local
5921 unsigned RevOpcode = IsFSHL ? TargetOpcode::G_FSHR : TargetOpcode::G_FSHL; in lowerFunnelShift()
H A DCombinerHelper.cpp3975 bool IsFSHL = Opc == TargetOpcode::G_FSHL; in applyFunnelShiftToRotate() local
3977 MI.setDesc(Builder.getTII().get(IsFSHL ? TargetOpcode::G_ROTL in applyFunnelShiftToRotate()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp8856 bool IsFSHL = Op.getOpcode() == ISD::FSHL; in LowerFunnelShift() local
8870 X = DAG.getNode(PPCISD::SHL, dl, VT, X, IsFSHL ? Z : SubZ); in LowerFunnelShift()
8871 Y = DAG.getNode(PPCISD::SRL, dl, VT, Y, IsFSHL ? SubZ : Z); in LowerFunnelShift()