| /freebsd-13.1/contrib/llvm-project/llvm/utils/TableGen/GlobalISel/ |
| H A D | GIMatchDagOperands.h | 48 bool IsDef; variable
51 GIMatchDagOperand(unsigned Idx, StringRef Name, bool IsDef) in GIMatchDagOperand() argument
52 : Idx(Idx), Name(Name), IsDef(IsDef) {} in GIMatchDagOperand()
56 bool isDef() const { return IsDef; } in isDef()
66 bool IsDef);
95 void add(StringRef Name, unsigned Idx, bool IsDef);
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| H A D | GIMatchDagOperands.cpp | 16 Profile(ID, Idx, Name, IsDef); in Profile()
20 StringRef Name, bool IsDef) { in Profile() argument
23 ID.AddBoolean(IsDef); in Profile()
26 void GIMatchDagOperandList::add(StringRef Name, unsigned Idx, bool IsDef) { in add() argument
28 Operands.emplace_back(Operands.size(), Name, IsDef); in add()
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| /freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | MachineOperand.h | 94 unsigned IsDef : 1; variable
372 return !IsDef; in isUse()
377 return IsDef; in isDef()
387 return IsDeadOrKill & IsDef; in isDead()
392 return IsDeadOrKill & !IsDef; in isKill()
501 assert(isReg() && !IsDef && "Wrong MachineOperand mutator");
507 assert(isReg() && IsDef && "Wrong MachineOperand mutator");
524 assert(isReg() && IsDef && "Wrong MachineOperand mutator");
529 assert(isReg() && !IsDef && "Wrong MachineOperand mutator");
801 Op.IsDef = isDef;
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| H A D | RDFGraph.h | 793 static bool IsDef(const NodeAddr<NodeBase*> BA) { in IsDef() function
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| /freebsd-13.1/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | InstrDocsEmitter.cpp | 152 bool IsDef = i < II->Operands.NumDefs; in EmitInstrDocs() local
166 OS << "* " << (IsDef ? "DEF" : "USE") << " ``" << Op.Rec->getName() in EmitInstrDocs()
177 OS << "* " << (IsDef ? "DEF" : "USE") << " ``" << Op.Rec->getName() in EmitInstrDocs()
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| H A D | GlobalISelEmitter.cpp | 2778 bool IsDef; member in __anon612774070111::AddRegisterRenderer
2783 const Record *RegisterDef, bool IsDef = false) in AddRegisterRenderer() argument
2785 IsDef(IsDef), Target(Target) {} in AddRegisterRenderer()
2808 if (IsDef) in emitRenderOpcodes()
2824 bool IsDef; member in __anon612774070111::TempRegRenderer
2828 TempRegRenderer(unsigned InsnID, unsigned TempRegID, bool IsDef = false, in TempRegRenderer() argument
2832 SubRegIdx(SubReg), IsDef(IsDef), IsDead(IsDead) {} in TempRegRenderer()
2840 assert(!IsDef); in emitRenderOpcodes()
2849 if (IsDef) { in emitRenderOpcodes()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | RDFDeadCode.cpp | 136 if (DFG.IsDef(RA)) in collect()
151 for (NodeAddr<DefNode*> DA : IA.Addr->members_if(DFG.IsDef, DFG)) in collect()
225 else if (DFG.IsDef(RA)) in erase()
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| H A D | HexagonConstExtenders.cpp | 327 bool IsDef = false; member
502 if (ED.IsDef) in operator <<()
1163 ED.IsDef = true; in recordExtender()
1183 ED.IsDef = true; in recordExtender()
1188 ED.IsDef = true; in recordExtender()
1192 ED.IsDef = true; in recordExtender()
1274 if (!ED.IsDef) in assignInits()
1294 if (ED.IsDef) in assignInits()
1850 assert((!ED.IsDef || ED.Rd.Reg != 0) && "Missing Rd for def"); in replaceInstr()
1875 if (ED.IsDef && Diff != 0) { in replaceInstr()
[all …]
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| H A D | HexagonRDFOpt.cpp | 168 if (DFG.IsDef(RA) && DeadNodes.count(RA.Id)) in run()
258 for (NodeAddr<DefNode*> DA : IA.Addr->members_if(DFG.IsDef, DFG)) { in rewrite()
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| H A D | HexagonFrameLowering.h | 175 bool IsDef, bool IsKill) const;
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| H A D | RDFCopy.cpp | 144 for (NodeAddr<DefNode*> DA : SA.Addr->members_if(DFG.IsDef, DFG)) { in run()
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| H A D | HexagonOptAddrMode.cpp | 183 if ((DFG->IsDef(AA) && AA.Id != OffsetRegRD) || in canRemoveAddasl()
246 for (NodeAddr<DefNode *> DA : SA.Addr->members_if(DFG->IsDef, *DFG)) { in getAllRealUses()
307 if ((DFG->IsDef(AA) && AA.Id != LRExtRegRD) || in isSafeToExtLR()
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| H A D | HexagonFrameLowering.cpp | 2614 const CSIVect &CSI, bool IsDef, bool IsKill) const { in addCalleeSaveRegistersAsImpOperand() argument
2617 MI->addOperand(MachineOperand::CreateReg(R.getReg(), IsDef, true, IsKill)); in addCalleeSaveRegistersAsImpOperand()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelDAGToDAG.h | 32 void addDSPCtrlRegOperands(bool IsDef, MachineInstr &MI,
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| H A D | MipsDelaySlotFiller.cpp | 130 bool IsDef) const;
435 unsigned Reg, bool IsDef) const { in checkRegDefsUses()
436 if (IsDef) { in checkRegDefsUses()
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| H A D | MipsSEISelDAGToDAG.cpp | 52 void MipsSEDAGToDAGISel::addDSPCtrlRegOperands(bool IsDef, MachineInstr &MI, in addDSPCtrlRegOperands() argument
57 IsDef ? RegState::ImplicitDefine : RegState::Implicit | RegState::Undef; in addDSPCtrlRegOperands()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineOperand.cpp | 104 if (IsDef == Val) in setIsDef()
111 IsDef = Val; in setIsDef()
115 IsDef = Val; in setIsDef()
259 IsDef = isDef; in ChangeToRegister()
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| H A D | RDFGraph.cpp | 1043 for (NodeAddr<DefNode*> DA : IA.Addr->members_if(IsDef, *this)) { in pushClobbers()
1089 for (NodeAddr<DefNode*> DA : IA.Addr->members_if(IsDef, *this)) { in pushDefs()
1398 for (NodeAddr<RefNode*> RA : IA.Addr->members_if(IsDef, *this)) in recordDefsForDF()
1645 return IsDef(RA) && (RA.Addr->getFlags() & NodeAttrs::Clobbering); in linkBlockRefs()
1648 return IsDef(RA) && !(RA.Addr->getFlags() & NodeAttrs::Clobbering); in linkBlockRefs()
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| H A D | BranchFolding.cpp | 1835 bool IsDef = false; in findHoistingInsertPosAndDeps() local
1846 IsDef = true; in findHoistingInsertPosAndDeps()
1850 if (!IsDef) in findHoistingInsertPosAndDeps()
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| H A D | RDFLiveness.cpp | 386 if (DFG.IsDef(R)) { in getNearestAliasedRef()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86LoadValueInjectionLoadHardening.cpp | 421 Owner.Addr->members_if(DataFlowGraph::IsDef, DFG)) { in getGadgetGraph()
474 NodeList Defs = ArgPhi.Addr->members_if(DataFlowGraph::IsDef, DFG); in getGadgetGraph()
486 NodeList Defs = SA.Addr->members_if(DataFlowGraph::IsDef, DFG); in getGadgetGraph()
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| H A D | X86FrameLowering.cpp | 3218 bool IsDef = false; in adjustStackWithPops() local
3222 IsDef = true; in adjustStackWithPops()
3227 if (IsDef) in adjustStackWithPops()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64LoadStoreOptimizer.cpp | 884 [this, RegToRename, GetMatchingSubReg](MachineInstr &MI, bool IsDef) { in mergePairedInsns() argument
885 if (IsDef) { in mergePairedInsns()
1401 bool IsDef) { in canRenameUpToDef() argument
1414 FoundDef = IsDef; in canRenameUpToDef()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/MIRParser/ |
| H A D | MIParser.cpp | 455 Optional<unsigned> &TiedDefIdx, bool IsDef = false);
1641 bool IsDef) { in parseRegisterOperand() argument
1642 unsigned Flags = IsDef ? RegState::Define : 0; in parseRegisterOperand()
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