| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonMapAsm2IntrinV62.gen.td | 9 multiclass T_VR_HVX_gen_pat <InstHexagon MI, Intrinsic IntID> { 10 def: Pat<(IntID HvxVR:$src1, IntRegs:$src2), 25 def: Pat<(IntID HvxVR:$src1, HvxVR:$src2), 32 def: Pat<(IntID HvxWR:$src1, HvxWR:$src2), 39 def: Pat<(IntID HvxWR:$src1, HvxVR:$src2, HvxVR:$src3), 47 def: Pat<(IntID HvxWR:$src1, IntRegs:$src2), 70 def: Pat<(IntID HvxQR:$src1, IntRegs:$src2), 85 def: Pat<(IntID HvxQR:$src1, HvxVR:$src2), 92 def: Pat<(IntID IntRegs:$src1), 99 def: Pat<(IntID HvxQR:$src1, HvxQR:$src2), [all …]
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| H A D | HexagonIntrinsicsV60.td | 84 multiclass T_R_pat <InstHexagon MI, Intrinsic IntID> { 91 def: Pat<(IntID HvxVR:$src1), 99 def: Pat<(IntID HvxWR:$src1), 107 def: Pat<(IntID HvxQR:$src1), 115 def: Pat<(IntID HvxWR:$src1, IntRegs:$src2), 123 def: Pat<(IntID HvxVR:$src1, IntRegs:$src2), 131 def: Pat<(IntID HvxWR:$src1, HvxVR:$src2), 139 def: Pat<(IntID HvxWR:$src1, HvxWR:$src2), 147 def: Pat<(IntID HvxVR:$src1, HvxVR:$src2), 155 def: Pat<(IntID HvxQR:$src1, IntRegs:$src2), [all …]
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| H A D | HexagonIntrinsics.td | 11 class T_R_pat <InstHexagon MI, Intrinsic IntID> 12 : Pat <(IntID I32:$Rs), 15 class T_RR_pat <InstHexagon MI, Intrinsic IntID> 16 : Pat <(IntID I32:$Rs, I32:$Rt), 19 class T_RP_pat <InstHexagon MI, Intrinsic IntID> 20 : Pat <(IntID I32:$Rs, I64:$Rt), 187 : Pat<(IntID I32:$Rs, Val:$Rt, I32:$Ru), 372 def: Pat<(!cast<Intrinsic>(IntID#"_128B") 380 def: Pat<(!cast<Intrinsic>(IntID#"_128B") 398 def: Pat<(!cast<Intrinsic>(IntID#"_128B") [all …]
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| H A D | HexagonOptimizeSZextends.cpp | 47 bool intrinsicAlreadySextended(Intrinsic::ID IntID); 56 bool HexagonOptimizeSZextends::intrinsicAlreadySextended(Intrinsic::ID IntID) { in intrinsicAlreadySextended() argument 57 switch(IntID) { in intrinsicAlreadySextended()
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| H A D | HexagonVectorCombine.cpp | 103 Value *createHvxIntrinsic(IRBuilder<> &Builder, Intrinsic::ID IntID, 1221 Intrinsic::ID IntID, Type *RetTy, in createHvxIntrinsic() argument 1270 Function *FI = Intrinsic::getDeclaration(F.getParent(), IntID); in createHvxIntrinsic()
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| H A D | HexagonISelLowering.cpp | 3601 Intrinsic::ID IntID = (SZ == 32) ? Intrinsic::hexagon_L2_loadw_locked in emitLoadLinked() local 3603 Function *Fn = Intrinsic::getDeclaration(M, IntID); in emitLoadLinked() 3627 Intrinsic::ID IntID = (SZ == 32) ? Intrinsic::hexagon_S2_storew_locked in emitStoreConditional() local 3629 Function *Fn = Intrinsic::getDeclaration(M, IntID); in emitStoreConditional()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Transforms/ObjCARC/ |
| H A D | ARCRuntimeEntryPoints.h | 138 Function *getIntrinsicEntryPoint(Function *&Decl, Intrinsic::ID IntID) { in getIntrinsicEntryPoint() argument 142 return Decl = Intrinsic::getDeclaration(TheModule, IntID); in getIntrinsicEntryPoint()
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| /freebsd-13.1/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | GlobalValue.h | 83 IntID((Intrinsic::ID)0U), Parent(nullptr) { in GlobalValue() 156 Intrinsic::ID IntID;
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| H A D | Function.h | 206 Intrinsic::ID getIntrinsicID() const LLVM_READONLY { return IntID; } in getIntrinsicID()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrAltivec.td | 268 class VA1a_Int_Ty<bits<6> xo, string opc, Intrinsic IntID, ValueType Ty> 271 [(set Ty:$vD, (IntID Ty:$vA, Ty:$vB, Ty:$vC))]>; 288 (IntID In1Ty:$vA, In1Ty:$vB, In2Ty:$vC))]>; 294 [(set Ty:$vD, (IntID Ty:$vA, Ty:$vB))]>; 302 [(set OutTy:$vD, (IntID InTy:$vA, InTy:$vB))]>; 310 [(set OutTy:$vD, (IntID In1Ty:$vA, In2Ty:$vB))]>; 313 class VX2_Int_SP<bits<11> xo, string opc, Intrinsic IntID> 316 [(set v4f32:$vD, (IntID v4f32:$vB))]>; 324 [(set OutTy:$vD, (IntID InTy:$vB))]>; 329 [(set Ty:$vD, (IntID Ty:$vA))]>; [all …]
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/IR/ |
| H A D | Function.cpp | 406 if (IntID) in Function() 407 setAttributes(Intrinsic::getAttributes(getContext(), IntID)); in Function() 703 return isTargetIntrinsic(IntID); in isTargetIntrinsic() 751 IntID = Intrinsic::not_intrinsic; in recalculateIntrinsicID() 755 IntID = lookupIntrinsicID(Name); in recalculateIntrinsicID()
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| /freebsd-13.1/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGObjC.cpp | 2116 llvm::Function *&fn, llvm::Intrinsic::ID IntID, in emitARCValueOperation() argument 2122 fn = CGF.CGM.getIntrinsic(IntID); in emitARCValueOperation() 2142 llvm::Intrinsic::ID IntID) { in emitARCLoadOperation() argument 2144 fn = CGF.CGM.getIntrinsic(IntID); in emitARCLoadOperation() 2167 llvm::Intrinsic::ID IntID, in emitARCStoreOperation() argument 2172 fn = CGF.CGM.getIntrinsic(IntID); in emitARCStoreOperation() 2193 llvm::Intrinsic::ID IntID) { in emitARCCopyOperation() argument 2197 fn = CGF.CGM.getIntrinsic(IntID); in emitARCCopyOperation()
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| H A D | CodeGenFunction.h | 4151 unsigned IntID); 4154 unsigned IntID); 4166 unsigned IntID); 4168 SmallVectorImpl<llvm::Value *> &Ops, unsigned IntID); 4171 unsigned IntID);
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| H A D | CGBuiltin.cpp | 7188 TblF = CGF.CGM.getIntrinsic(IntID, ResTy); in packTBLDVectorList() 8543 unsigned IntID; in EmitSVEPredicateCast() local 8551 IntID = Intrinsic::aarch64_sve_convert_from_svbool; in EmitSVEPredicateCast() 8555 IntID = Intrinsic::aarch64_sve_convert_to_svbool; in EmitSVEPredicateCast() 8560 Function *F = CGM.getIntrinsic(IntID, IntrinsicTy); in EmitSVEPredicateCast() 8591 F = CGM.getIntrinsic(IntID, OverloadedTy); in EmitSVEGatherLoad() 8640 F = CGM.getIntrinsic(IntID, OverloadedTy); in EmitSVEScatterStore() 8702 Function *F = CGM.getIntrinsic(IntID, OverloadedTy); in EmitSVEGatherPrefetch() 8714 switch (IntID) { in EmitSVEStructLoad() 8748 switch (IntID) { in EmitSVEStructStore() [all …]
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelDAGToDAG.cpp | 87 SDValue IntID = in PreprocessISelDAG() local 89 SDValue Ops[] = {Chain, IntID, StackSlot, in PreprocessISelDAG()
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| H A D | RISCVISelLowering.cpp | 1865 SDValue IntID = in lowerVECTOR_SHUFFLE() local 1867 SDValue Ops[] = {Ld->getChain(), IntID, NewAddr, in lowerVECTOR_SHUFFLE() 4364 SDValue IntID = DAG.getTargetConstant(Intrinsic::riscv_vle_mask, DL, XLenVT); in lowerMLOAD() local 4365 SDValue Ops[] = {Load->getChain(), IntID, PassThru, in lowerMLOAD() 4399 SDValue IntID = DAG.getTargetConstant(Intrinsic::riscv_vse_mask, DL, XLenVT); in lowerMSTORE() local 4402 {Store->getChain(), IntID, Val, Store->getBasePtr(), Mask, VL}, in lowerMSTORE() 4656 unsigned IntID = in lowerMGATHER() local 4659 DAG.getTargetConstant(IntID, DL, XLenVT)}; in lowerMGATHER() 4737 unsigned IntID = in lowerMSCATTER() local 4740 DAG.getTargetConstant(IntID, DL, XLenVT)}; in lowerMSCATTER()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 1782 Intrinsic::ID IntID = static_cast<Intrinsic::ID>(CN->getZExtValue()); in computeKnownBitsForTargetNode() local 1783 switch (IntID) { in computeKnownBitsForTargetNode() 17327 Intrinsic::ID IntID = static_cast<Intrinsic::ID>(CN->getZExtValue()); in ReplaceNodeResults() local 17328 switch (IntID) { in ReplaceNodeResults()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 18838 Intrinsic::ID IntID = static_cast<Intrinsic::ID>(CN->getZExtValue()); in computeKnownBitsForTargetNode() local 18839 switch (IntID) { in computeKnownBitsForTargetNode()
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