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Searched refs:Instr (Results 1 – 25 of 112) sorted by relevance

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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMFeatures.h21 bool IsCPSRDead(const InstrType *Instr);
24 inline bool isV8EligibleForIT(const InstrType *Instr) { in isV8EligibleForIT() argument
25 switch (Instr->getOpcode()) { in isV8EligibleForIT()
52 return IsCPSRDead(Instr); in isV8EligibleForIT()
79 return Instr->getOperand(2).getReg() != ARM::PC; in isV8EligibleForIT()
84 return Instr->getOperand(0).getReg() != ARM::PC; in isV8EligibleForIT()
86 return Instr->getOperand(0).getReg() != ARM::PC && in isV8EligibleForIT()
87 Instr->getOperand(2).getReg() != ARM::PC; in isV8EligibleForIT()
90 return Instr->getOperand(0).getReg() != ARM::PC && in isV8EligibleForIT()
91 Instr->getOperand(1).getReg() != ARM::PC; in isV8EligibleForIT()
H A DMVETPAndVPTOptimisationsPass.cpp578 if (Instr.getNumOperands() == 0) in IsWritingToVCCR()
605 BuildMI(MBB, &Instr, Instr.getDebugLoc(), TII->get(ARM::MVE_VPNOT)) in ReplaceRegisterUseWithVPNOT()
841 if (!IsVCMP(Instr.getOpcode())) { in ReplaceVCMPsByVPNOTs()
843 if (IsWritingToVCCR(Instr)) in ReplaceVCMPsByVPNOTs()
849 PrevVCMP = &Instr; in ReplaceVCMPsByVPNOTs()
859 BuildMI(MBB, &Instr, Instr.getDebugLoc(), TII->get(ARM::MVE_VPNOT)) in ReplaceVCMPsByVPNOTs()
860 .add(Instr.getOperand(0)) in ReplaceVCMPsByVPNOTs()
865 Instr.dump()); in ReplaceVCMPsByVPNOTs()
874 DeadInstructions.push_back(&Instr); in ReplaceVCMPsByVPNOTs()
942 auto VPNot = BuildMI(MBB, &Instr, Instr.getDebugLoc(), in ReplaceConstByVPNOTs()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/M68k/Disassembler/
H A DM68kDisassembler.cpp126 DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
129 void decodeReg(MCInst &Instr, unsigned int Bead,
131 void decodeImm(MCInst &Instr, unsigned int Bead,
375 const MCInstrDesc &Desc = MCII->get(Instr.getOpcode()); in getRegOperandIndex()
395 const MCInstrDesc &Desc = MCII->get(Instr.getOpcode()); in getImmOperandIndex()
476 Instr.setOpcode(Lookup.OpCode); in getInstruction()
486 const MCInstrDesc &Desc = MCII->get(Instr.getOpcode()); in getInstruction()
529 MIOpIdx = getRegOperandIndex(Instr, Bead); in getInstruction()
534 decodeReg(Instr, Bead, Reader, Scratch[MIOpIdx]); in getInstruction()
542 MIOpIdx = getImmOperandIndex(Instr, Bead); in getInstruction()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DCorrelatedValuePropagation.cpp707 IRBuilder<> B{Instr}; in narrowSDivOrSRem()
713 auto *BO = B.CreateBinOp(Instr->getOpcode(), LHS, RHS, Instr->getName()); in narrowSDivOrSRem()
714 auto *Sext = B.CreateSExt(BO, Instr->getType(), Instr->getName() + ".sext"); in narrowSDivOrSRem()
719 Instr->replaceAllUsesWith(Sext); in narrowSDivOrSRem()
720 Instr->eraseFromParent(); in narrowSDivOrSRem()
751 IRBuilder<> B{Instr}; in processUDivOrURem()
757 auto *BO = B.CreateBinOp(Instr->getOpcode(), LHS, RHS, Instr->getName()); in processUDivOrURem()
758 auto *Zext = B.CreateZExt(BO, Instr->getType(), Instr->getName() + ".zext"); in processUDivOrURem()
764 Instr->eraseFromParent(); in processUDivOrURem()
883 if (processSDiv(Instr, LVI)) in processSDivOrSRem()
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H A DGuardWidening.cpp136 Instruction *Instr, const df_iterator<DomTreeNode *> &DFSI,
328 Instruction *Instr, const df_iterator<DomTreeNode *> &DFSI, in eliminateInstrViaWidening() argument
334 if (isa<ConstantInt>(getCondition(Instr))) in eliminateInstrViaWidening()
350 auto E = Instr->getParent() == CurBB ? find(GuardsInCurBB, Instr) in eliminateInstrViaWidening()
371 LLVM_DEBUG(dbgs() << "Score between " << *getCondition(Instr) in eliminateInstrViaWidening()
382 LLVM_DEBUG(dbgs() << "Did not eliminate guard " << *Instr << "\n"); in eliminateInstrViaWidening()
387 assert(DT.dominates(BestSoFar, Instr) && "Should be!"); in eliminateInstrViaWidening()
389 LLVM_DEBUG(dbgs() << "Widening " << *Instr << " into " << *BestSoFar in eliminateInstrViaWidening()
392 widenGuard(BestSoFar, getCondition(Instr), InvertCondition); in eliminateInstrViaWidening()
396 setCondition(Instr, NewGuardCondition); in eliminateInstrViaWidening()
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/freebsd-13.1/contrib/llvm-project/llvm/utils/TableGen/GlobalISel/
H A DGIMatchDagPredicate.cpp27 GIMatchDagContext &Ctx, StringRef Name, const CodeGenInstruction &Instr) in GIMatchDagOpcodePredicate() argument
30 Instr(Instr) {} in GIMatchDagOpcodePredicate()
33 OS << "$mi.getOpcode() == " << Instr.TheDef->getName(); in printDescription()
44 for (const CodeGenInstruction *Instr : Instrs) { in printDescription() local
45 OS << Separator << Instr->TheDef->getName(); in printDescription()
H A DGIMatchDagPredicate.h80 const CodeGenInstruction &Instr; variable
84 const CodeGenInstruction &Instr);
90 const CodeGenInstruction *getInstr() const { return &Instr; } in getInstr()
105 void addOpcode(const CodeGenInstruction *Instr) { Instrs.push_back(Instr); } in addOpcode() argument
H A DGIMatchTree.cpp112 Instr, GIMatchTreeInstrInfo(ID, Instr))); in declareInstr()
115 if (Instr == nullptr) in declareInstr()
118 if (!Instr->getUserAssignedName().empty()) in declareInstr()
119 Info.bindInstrVariable(Instr->getUserAssignedName(), ID); in declareInstr()
120 for (const auto &VarBinding : Instr->user_assigned_operand_names()) in declareInstr()
124 const auto &NodeI = find(MatchDag.instr_nodes(), Instr); in declareInstr()
138 if (Dep.value()->getRequiredMI() == Instr && in declareInstr()
155 GIMatchTreeOperandInfo(Instr, OpIdx))); in declareOperand()
161 if (E.value()->getFromMI() == Instr && in declareOperand()
573 const GIMatchDagInstr *Instr = InstrInfo->getInstrNode(); in applyForPartition() local
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Lanai/Disassembler/
H A DLanaiDisassembler.cpp90 static void PostOperandDecodeAdjust(MCInst &Instr, uint32_t Insn) { in PostOperandDecodeAdjust() argument
94 if (isRMOpcode(Instr.getOpcode())) in PostOperandDecodeAdjust()
96 else if (isSPLSOpcode(Instr.getOpcode())) in PostOperandDecodeAdjust()
98 else if (isRRMOpcode(Instr.getOpcode())) { in PostOperandDecodeAdjust()
112 if (Instr.getOperand(2).isReg()) { in PostOperandDecodeAdjust()
113 Instr.getOperand(2).setReg(Lanai::R0); in PostOperandDecodeAdjust()
115 if (Instr.getOperand(2).isImm()) in PostOperandDecodeAdjust()
116 Instr.getOperand(2).setImm(0); in PostOperandDecodeAdjust()
127 Instr.addOperand(MCOperand::createImm(AluOp)); in PostOperandDecodeAdjust()
132 LanaiDisassembler::getInstruction(MCInst &Instr, uint64_t &Size, in getInstruction() argument
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600OptimizeVectorRegisters.cpp51 MachineInstr *Instr; member in __anon02f68eeb0111::RegSeqInfo
58 MachineOperand &MO = Instr->getOperand(i); in RegSeqInfo()
59 unsigned Chan = Instr->getOperand(i + 1).getImm(); in RegSeqInfo()
70 return RSI.Instr == Instr; in operator ==()
185 Register Reg = RSI->Instr->getOperand(0).getReg(); in RebuildVector()
186 MachineBasicBlock::iterator Pos = RSI->Instr; in RebuildVector()
226 RSI->Instr->eraseFromParent(); in RebuildVector()
229 RSI->Instr = NewMI; in RebuildVector()
315 PreviousRegSeq[RSI.Instr] = RSI; in trackRSI()
365 RemoveMI(CandidateRSI.Instr); in runOnMachineFunction()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyDebugValueManager.cpp22 MachineInstr *Instr) { in WebAssemblyDebugValueManager() argument
25 if (!Instr->getOperand(0).isReg()) in WebAssemblyDebugValueManager()
27 CurrentReg = Instr->getOperand(0).getReg(); in WebAssemblyDebugValueManager()
29 MachineBasicBlock::iterator DI = *Instr; in WebAssemblyDebugValueManager()
31 for (MachineBasicBlock::iterator DE = Instr->getParent()->end(); DI != DE; in WebAssemblyDebugValueManager()
34 DI->hasDebugOperandForReg(Instr->getOperand(0).getReg())) in WebAssemblyDebugValueManager()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/BPF/Disassembler/
H A DBPFDisassembler.cpp68 DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
164 DecodeStatus BPFDisassembler::getInstruction(MCInst &Instr, uint64_t &Size, in getInstruction() argument
181 Result = decodeInstruction(DecoderTableBPFALU3264, Instr, Insn, Address, in getInstruction()
184 Result = decodeInstruction(DecoderTableBPF64, Instr, Insn, Address, this, in getInstruction()
189 switch (Instr.getOpcode()) { in getInstruction()
201 auto& Op = Instr.getOperand(1); in getInstruction()
211 auto Op = Instr.getOperand(0); in getInstruction()
212 Instr.clear(); in getInstruction()
213 Instr.addOperand(MCOperand::createReg(BPF::R6)); in getInstruction()
214 Instr.addOperand(Op); in getInstruction()
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DVectorUtils.h592 : Alignment(Alignment), InsertPos(Instr) { in InterleaveGroup()
597 Members[0] = Instr; in InterleaveGroup()
648 Members[Key] = Instr; in insertMember()
662 uint32_t getIndex(const InstTy *Instr) const { in getIndex() argument
664 if (I.second == Instr) in getIndex()
766 bool isInterleaved(Instruction *Instr) const { in isInterleaved() argument
774 getInterleaveGroup(const Instruction *Instr) const { in getInterleaveGroup() argument
775 return InterleaveGroupMap.lookup(Instr); in getInterleaveGroup()
847 assert(!InterleaveGroupMap.count(Instr) && in createInterleaveGroup()
849 InterleaveGroupMap[Instr] = in createInterleaveGroup()
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/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DDbgEntityHistoryCalculator.h79 Entry(const MachineInstr *Instr, EntryKind Kind) in Entry() argument
80 : Instr(Instr, Kind), EndIndex(NoEntry) {} in Entry()
82 const MachineInstr *getInstr() const { return Instr.getPointer(); } in getInstr()
84 EntryKind getEntryKind() const { return Instr.getInt(); } in getEntryKind()
93 PointerIntPair<const MachineInstr *, 1, EntryKind> Instr;
H A DScheduleDAG.h247 MachineInstr *Instr = nullptr; ///< Alternatively, a MachineInstr. variable
320 : Instr(instr), NodeNum(nodenum), isVRegCycle(false), isCall(false), in SUnit()
349 assert(!Instr && "Setting SDNode of SUnit with MachineInstr!"); in setNode()
356 assert(!Instr && "Reading SDNode of SUnit with MachineInstr!"); in getNode()
362 bool isInstr() const { return Instr; } in isInstr()
368 Instr = MI; in setInstr()
375 return Instr; in getInstr()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64PromoteConstant.cpp280 if (isa<const ExtractValueInst>(Instr) && OpIdx > 0) in shouldConvertUse()
284 if (isa<const InsertValueInst>(Instr) && OpIdx > 1) in shouldConvertUse()
287 if (isa<const AllocaInst>(Instr) && OpIdx > 0) in shouldConvertUse()
291 if (isa<const LoadInst>(Instr) && OpIdx > 0) in shouldConvertUse()
295 if (isa<const StoreInst>(Instr) && OpIdx > 1) in shouldConvertUse()
299 if (isa<const GetElementPtrInst>(Instr) && OpIdx > 0) in shouldConvertUse()
304 if (isa<const LandingPadInst>(Instr)) in shouldConvertUse()
308 if (isa<const SwitchInst>(Instr)) in shouldConvertUse()
312 if (isa<const IndirectBrInst>(Instr)) in shouldConvertUse()
316 if (isa<const IntrinsicInst>(Instr)) in shouldConvertUse()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/
H A DRemoveRedundantDebugValues.cpp139 for (auto &Instr : DbgValsToBeRemoved) { in reduceDbgValsForwardScan() local
140 LLVM_DEBUG(dbgs() << "removing "; Instr->dump()); in reduceDbgValsForwardScan()
141 Instr->eraseFromParent(); in reduceDbgValsForwardScan()
197 for (auto &Instr : DbgValsToBeRemoved) { in reduceDbgValsBackwardScan() local
198 LLVM_DEBUG(dbgs() << "removing "; Instr->dump()); in reduceDbgValsBackwardScan()
199 Instr->eraseFromParent(); in reduceDbgValsBackwardScan()
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DRegBankSelect.h207 MachineInstr &Instr;
216 return Instr; in getPointImpl()
217 return Instr.getNextNode() ? *Instr.getNextNode() in getPointImpl()
218 : Instr.getParent()->end(); in getPointImpl()
222 return *Instr.getParent(); in getInsertMBBImpl()
227 InstrInsertPoint(MachineInstr &Instr, bool Before = true);
/freebsd-13.1/contrib/llvm-project/llvm/lib/ExecutionEngine/JITLink/
H A DMachO_arm64.cpp297 uint32_t Instr = *(const ulittle32_t *)FixupContent; in addRelocations() local
298 if ((Instr & 0x7fffffff) != 0x14000000) in addRelocations()
332 uint32_t Instr = *(const ulittle32_t *)FixupContent; in addRelocations() local
333 if ((Instr & 0xffffffe0) != 0x90000000) in addRelocations()
344 uint32_t Instr = *(const ulittle32_t *)FixupContent; in addRelocations() local
345 uint32_t EncodedAddend = (Instr & 0x003FFC00) >> 10; in addRelocations()
357 if ((Instr & 0xfffffc00) != 0xf9400000) in addRelocations()
512 static unsigned getPageOffset12Shift(uint32_t Instr) { in getPageOffset12Shift() argument
516 if ((Instr & LoadStoreImm12Mask) == 0x39000000) { in getPageOffset12Shift()
517 uint32_t ImplicitShift = Instr >> 30; in getPageOffset12Shift()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXImageOptimizer.cpp64 Instruction &Instr = *I; in runOnFunction() local
72 Changed |= replaceIsTypePSampler(Instr); in runOnFunction()
75 Changed |= replaceIsTypePSurface(Instr); in runOnFunction()
78 Changed |= replaceIsTypePTexture(Instr); in runOnFunction()
H A DNVPTXProxyRegErasure.cpp56 void replaceRegisterUsage(MachineInstr &Instr, MachineOperand &From,
109 void NVPTXProxyRegErasure::replaceRegisterUsage(MachineInstr &Instr, in replaceRegisterUsage() argument
112 for (auto &Op : Instr.uses()) { in replaceRegisterUsage()
/freebsd-13.1/contrib/llvm-project/llvm/lib/MC/
H A DMCDwarf.cpp1297 switch (Instr.getOperation()) { in emitCFIInstruction()
1319 unsigned Reg = Instr.getRegister(); in emitCFIInstruction()
1332 CFAOffset += Instr.getOffset(); in emitCFIInstruction()
1334 CFAOffset = Instr.getOffset(); in emitCFIInstruction()
1341 unsigned Reg = Instr.getRegister(); in emitCFIInstruction()
1346 CFAOffset = Instr.getOffset(); in emitCFIInstruction()
1352 unsigned Reg = Instr.getRegister(); in emitCFIInstruction()
1362 unsigned Reg = Instr.getRegister(); in emitCFIInstruction()
1367 CFAOffset = Instr.getOffset(); in emitCFIInstruction()
1382 int Offset = Instr.getOffset(); in emitCFIInstruction()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARC/Disassembler/
H A DARCDisassembler.cpp43 DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
314 DecodeStatus ARCDisassembler::getInstruction(MCInst &Instr, uint64_t &Size, in getInstruction() argument
339 decodeInstruction(DecoderTable64, Instr, Insn64, Address, this, STI); in getInstruction()
351 return decodeInstruction(DecoderTable32, Instr, Insn32, Address, this, STI); in getInstruction()
359 decodeInstruction(DecoderTable48, Instr, Insn48, Address, this, STI); in getInstruction()
374 return decodeInstruction(DecoderTable16, Instr, Insn16, Address, this, STI); in getInstruction()
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DRegBankSelect.cpp869 RegBankSelect::InstrInsertPoint::InstrInsertPoint(MachineInstr &Instr, in InstrInsertPoint() argument
871 : InsertPoint(), Instr(Instr), Before(Before) { in InstrInsertPoint()
874 assert((!Before || !Instr.isPHI()) && in InstrInsertPoint()
876 assert((!Before || !Instr.getNextNode() || !Instr.getNextNode()->isPHI()) && in InstrInsertPoint()
905 return Instr.isTerminator(); in isSplit()
908 return Instr.getPrevNode() && Instr.getPrevNode()->isTerminator(); in isSplit()
918 return MBFI->getBlockFreq(Instr.getParent()).getFrequency(); in frequency()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVMatInt.cpp20 for (auto Instr : Res) { in getInstSeqCost() local
22 switch (Instr.Opc) { in getInstSeqCost()
31 Compressed = isInt<6>(Instr.Imm); in getInstSeqCost()

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