| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | UnreachableBlockElim.cpp | 174 Register InputReg = Input.getReg(); in runOnMachineFunction() local
179 if (InputReg != OutputReg) { in runOnMachineFunction()
183 MRI.constrainRegClass(InputReg, MRI.getRegClass(OutputReg)) && in runOnMachineFunction()
185 MRI.replaceRegWith(OutputReg, InputReg); in runOnMachineFunction()
194 .addReg(InputReg, getRegState(Input), InputSub); in runOnMachineFunction()
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| H A D | TargetInstrInfo.cpp | 1312 RegSubRegPairAndIdx &InputReg) const { in getExtractSubregInputs()
1317 return getExtractSubregLikeInputs(MI, DefIdx, InputReg); in getExtractSubregInputs()
1329 InputReg.Reg = MOReg.getReg(); in getExtractSubregInputs()
1330 InputReg.SubReg = MOReg.getSubReg(); in getExtractSubregInputs()
1331 InputReg.SubIdx = (unsigned)MOSubIdx.getImm(); in getExtractSubregInputs()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 798 Register InputReg = MRI.createGenericVirtualRegister(ArgTy); in passSpecialInputs() local
804 LI->getImplicitArgPtr(InputReg, MRI, MIRBuilder); in passSpecialInputs()
848 Register InputReg; in passSpecialInputs() local
850 InputReg = MRI.createGenericVirtualRegister(S32); in passSpecialInputs()
851 LI->loadInputValue(InputReg, MIRBuilder, IncomingArgX, in passSpecialInputs()
861 InputReg = InputReg ? MIRBuilder.buildOr(S32, InputReg, Y).getReg(0) : Y; in passSpecialInputs()
870 InputReg = InputReg ? MIRBuilder.buildOr(S32, InputReg, Z).getReg(0) : Z; in passSpecialInputs()
873 if (!InputReg) { in passSpecialInputs()
874 InputReg = MRI.createGenericVirtualRegister(S32); in passSpecialInputs()
881 LI->loadInputValue(InputReg, MIRBuilder, &IncomingArg, in passSpecialInputs()
[all …]
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| H A D | SILowerControlFlow.cpp | 661 Register InputReg = MI.getOperand(0).getReg(); in lowerInitExec() local
663 if (InputReg.isVirtual()) { in lowerInitExec()
664 MachineInstr *DefInstr = MRI->getVRegDef(InputReg); in lowerInitExec()
687 .addReg(InputReg) in lowerInitExec()
716 LIS->removeInterval(InputReg); in lowerInitExec()
717 LIS->createAndComputeVirtRegInterval(InputReg); in lowerInitExec()
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| H A D | SIFixSGPRCopies.cpp | 835 Register InputReg = MI.getOperand(i).getReg(); in processPHINode() local
836 MachineInstr *Def = MRI->getVRegDef(InputReg); in processPHINode()
837 if (TRI->isVectorRegister(*MRI, InputReg)) { in processPHINode()
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| H A D | SIISelLowering.cpp | 2779 SDValue InputReg; in passSpecialInputs() local
2782 InputReg = loadInputValue(DAG, ArgRC, ArgVT, DL, *IncomingArg); in passSpecialInputs()
2787 InputReg = getImplicitArgPtr(DAG, DL); in passSpecialInputs()
2791 RegsToPass.emplace_back(OutgoingArg->getRegister(), InputReg); in passSpecialInputs()
2827 SDValue InputReg; in passSpecialInputs() local
2838 InputReg = InputReg.getNode() ? in passSpecialInputs()
2839 DAG.getNode(ISD::OR, SL, MVT::i32, InputReg, Y) : Y; in passSpecialInputs()
2846 InputReg = InputReg.getNode() ? in passSpecialInputs()
2847 DAG.getNode(ISD::OR, SL, MVT::i32, InputReg, Z) : Z; in passSpecialInputs()
2850 if (!InputReg.getNode()) { in passSpecialInputs()
[all …]
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FastISel.cpp | 2530 Register InputReg = getRegForValue(I->getOperand(0)); in X86SelectTrunc() local
2531 if (!InputReg) in X86SelectTrunc()
2537 updateValueMap(I, InputReg); in X86SelectTrunc()
2601 Register InputReg = getRegForValue(Op); in fastLowerIntrinsicCall() local
2602 if (InputReg == 0) in fastLowerIntrinsicCall()
2627 InputReg = fastEmitInst_ri(Opc, RC, InputReg, 4); in fastLowerIntrinsicCall()
2634 .addReg(InputReg, RegState::Kill); in fastLowerIntrinsicCall()
2642 InputReg = fastEmit_r(MVT::i16, MVT::i32, ISD::ZERO_EXTEND, InputReg); in fastLowerIntrinsicCall()
2646 InputReg); in fastLowerIntrinsicCall()
2650 InputReg = fastEmitInst_r(Opc, RC, InputReg); in fastLowerIntrinsicCall()
[all …]
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| /freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 541 RegSubRegPairAndIdx &InputReg) const;
1251 RegSubRegPairAndIdx &InputReg) const { in getExtractSubregLikeInputs() argument
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 1391 Register InputReg = getRegForValue(I->getOperand(0)); in selectCast() local
1392 if (!InputReg) in selectCast()
1397 Opcode, InputReg); in selectCast()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.h | 75 RegSubRegPairAndIdx &InputReg) const override;
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| H A D | ARMBaseInstrInfo.cpp | 5355 RegSubRegPairAndIdx &InputReg) const { in getExtractSubregLikeInputs()
5368 InputReg.Reg = MOReg.getReg(); in getExtractSubregLikeInputs()
5369 InputReg.SubReg = MOReg.getSubReg(); in getExtractSubregLikeInputs()
5370 InputReg.SubIdx = DefIdx == 0 ? ARM::ssub_0 : ARM::ssub_1; in getExtractSubregLikeInputs()
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