Home
last modified time | relevance | path

Searched refs:InputArg (Results 1 – 25 of 59) sorted by relevance

123

/freebsd-13.1/contrib/llvm-project/clang/include/clang/Driver/
H A DInputInfo.h32 InputArg, enumerator
38 const llvm::opt::Arg *InputArg; member
65 : Kind(InputArg), Act(nullptr), Type(_Type), BaseInput(_BaseInput) { in InputInfo()
66 Data.InputArg = _InputArg; in InputInfo()
70 : Kind(InputArg), Act(A), Type(GetActionType(A)), BaseInput(_BaseInput) { in InputInfo()
71 Data.InputArg = _InputArg; in InputInfo()
76 bool isInputArg() const { return Kind == InputArg; } in isInputArg()
89 return *Data.InputArg; in getInputArg()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsCCState.h47 void PreAnalyzeCallResultForF128(const SmallVectorImpl<ISD::InputArg> &Ins,
64 PreAnalyzeFormalArgumentsForF128(const SmallVectorImpl<ISD::InputArg> &Ins);
67 PreAnalyzeCallResultForVectorFloat(const SmallVectorImpl<ISD::InputArg> &Ins,
71 const SmallVectorImpl<ISD::InputArg> &Ins);
131 void PreAnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in PreAnalyzeFormalArguments()
139 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments()
151 void PreAnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, in PreAnalyzeCallResult()
161 void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeCallResult()
H A DMipsCCState.cpp87 const SmallVectorImpl<ISD::InputArg> &Ins, in PreAnalyzeCallResultForF128()
112 const SmallVectorImpl<ISD::InputArg> &Ins, const Type *RetTy) { in PreAnalyzeCallResultForVectorFloat()
181 const SmallVectorImpl<ISD::InputArg> &Ins) { in PreAnalyzeFormalArgumentsForF128()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.h118 const SmallVectorImpl<ISD::InputArg> &Ins,
124 const SmallVectorImpl<ISD::InputArg> &Ins,
130 const SmallVectorImpl<ISD::InputArg> &Ins,
139 const SmallVectorImpl<ISD::InputArg> &Ins,
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.h146 const SmallVectorImpl<ISD::InputArg> &Ins,
152 const SmallVectorImpl<ISD::InputArg> &Ins,
158 const SmallVectorImpl<ISD::InputArg> &Ins,
164 const SmallVectorImpl<ISD::InputArg> &Ins,
H A DMSP430ISelLowering.cpp446 const SmallVectorImpl<ISD::InputArg> &Ins) { in AnalyzeVarArgs()
550 const SmallVectorImpl<ISD::InputArg> &Ins) { in AnalyzeRetResult()
568 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments()
591 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall()
619 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCCCArguments()
807 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCCCCallTo()
935 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCallResult()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kISelLowering.h197 const SmallVectorImpl<ISD::InputArg> &ArgInfo,
226 const SmallVectorImpl<ISD::InputArg> &Ins,
234 const SmallVectorImpl<ISD::InputArg> &Ins,
273 const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG &DAG) const;
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCCCState.h25 PreAnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins);
50 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments()
H A DPPCISelLowering.h1195 const SmallVectorImpl<ISD::InputArg> &Ins,
1201 const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG &DAG) const;
1260 const SmallVectorImpl<ISD::InputArg> &Ins,
1268 const SmallVectorImpl<ISD::InputArg> &Ins,
1274 const SmallVectorImpl<ISD::InputArg> &Ins,
1297 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl,
1301 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl,
1305 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl,
1316 const SmallVectorImpl<ISD::InputArg> &Ins,
1323 const SmallVectorImpl<ISD::InputArg> &Ins,
[all …]
H A DPPCCCState.cpp27 const SmallVectorImpl<ISD::InputArg> &Ins) { in PreAnalyzeFormalArguments()
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetCallingConv.h195 struct InputArg { struct
211 InputArg() = default; argument
212 InputArg(ArgFlagsTy flags, EVT vt, EVT argvt, bool used, in InputArg() function
H A DCallingConvLower.h283 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
287 void AnalyzeArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeArguments()
322 void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
525 const SmallVectorImpl<ISD::InputArg> &Ins,
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCISelLowering.h83 const SmallVectorImpl<ISD::InputArg> &Ins,
97 const SmallVectorImpl<ISD::InputArg> &Ins,
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreISelLowering.h148 const SmallVectorImpl<ISD::InputArg> &Ins,
156 const SmallVectorImpl<ISD::InputArg> &Ins,
212 const SmallVectorImpl<ISD::InputArg> &Ins,
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.h121 const SmallVectorImpl<ISD::InputArg> &Ins,
126 const SmallVectorImpl<ISD::InputArg> &Ins,
131 const SmallVectorImpl<ISD::InputArg> &Ins,
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFISelLowering.h82 const SmallVectorImpl<ISD::InputArg> &Ins,
96 const SmallVectorImpl<ISD::InputArg> &Ins,
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.h54 const ISD::InputArg *Arg = nullptr) const;
58 const ISD::InputArg &Arg) const;
131 bool Signed, const ISD::InputArg *Arg = nullptr) const;
320 const SmallVectorImpl<ISD::InputArg> &Ins,
344 const SmallVectorImpl<ISD::InputArg> &Ins,
355 const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG &DAG) const;
H A DR600ISelLowering.h43 const SmallVectorImpl<ISD::InputArg> &Ins,
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/
H A DCallingConvLower.cpp90 CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments()
167 void CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeCallResult()
269 const SmallVectorImpl<ISD::InputArg> &Ins, in resultsCompatible()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelLowering.h170 const SmallVectorImpl<ISD::InputArg> &Ins,
177 const SmallVectorImpl<ISD::InputArg> &Ins,
/freebsd-13.1/contrib/llvm-project/clang/lib/Driver/
H A DDriver.cpp3348 auto &OffloadKind = InputArgToOffloadKindMap[InputArg]; in addDeviceDependencesToHostAction()
3393 const Arg *InputArg) { in addHostDependenceToDeviceActions() argument
3418 auto &OffloadKind = InputArgToOffloadKindMap[InputArg]; in addHostDependenceToDeviceActions()
3448 const Arg *InputArg) { in appendTopLevelActions() argument
3588 const Arg *InputArg = I.second; in handleArguments() local
3597 if (InputArg->isClaimed()) in handleArguments()
3601 InputArg->claim(); in handleArguments()
3621 << InputArg->getAsString(Args) << !!FinalPhaseArg in handleArguments()
3718 const Arg *InputArg = I.second; in BuildActions() local
3738 Current, InputArg, Phase, PL.back(), FullPL); in BuildActions()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.h1457 const SmallVectorImpl<ISD::InputArg> &Ins,
1462 const SmallVectorImpl<ISD::InputArg> &ArgInfo,
1483 const SmallVectorImpl<ISD::InputArg> &Ins,
1551 const SmallVectorImpl<ISD::InputArg> &Ins,
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.h126 const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG& DAG) const;
193 const SmallVectorImpl<ISD::InputArg> &Ins,
214 const SmallVectorImpl<ISD::InputArg> &Ins,
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZCallingConv.h51 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.h865 const SmallVectorImpl<ISD::InputArg> &Ins,
893 const SmallVectorImpl<ISD::InputArg> &Ins,
921 const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG &DAG,

123