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Searched refs:ImplicitDefine (Results 1 – 25 of 28) sorted by relevance

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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIFrameLowering.cpp178 .addReg(TargetReg, RegState::ImplicitDefine); in buildGitPtr()
561 .addReg(ScratchRsrcReg, RegState::ImplicitDefine) in emitEntryFunctionScratchRsrcRegSetup()
595 .addReg(ScratchRsrcReg, RegState::ImplicitDefine); in emitEntryFunctionScratchRsrcRegSetup()
610 .addReg(ScratchRsrcReg, RegState::ImplicitDefine); in emitEntryFunctionScratchRsrcRegSetup()
621 .addReg(ScratchRsrcReg, RegState::ImplicitDefine); in emitEntryFunctionScratchRsrcRegSetup()
625 .addReg(ScratchRsrcReg, RegState::ImplicitDefine); in emitEntryFunctionScratchRsrcRegSetup()
631 .addReg(ScratchRsrcReg, RegState::ImplicitDefine); in emitEntryFunctionScratchRsrcRegSetup()
635 .addReg(ScratchRsrcReg, RegState::ImplicitDefine); in emitEntryFunctionScratchRsrcRegSetup()
662 .addReg(ScratchRsrcReg, RegState::ImplicitDefine); in emitEntryFunctionScratchRsrcRegSetup()
666 .addReg(ScratchRsrcReg, RegState::ImplicitDefine); in emitEntryFunctionScratchRsrcRegSetup()
H A DSIRegisterInfo.cpp195 I.addReg(TmpVGPR, RegState::ImplicitDefine); in prepare()
206 I.addReg(TmpVGPR, RegState::ImplicitDefine); in prepare()
1191 MIB.addReg(ValueReg, RegState::ImplicitDefine); in buildSpillLoadStore()
1237 AccRead.addReg(ValueReg, RegState::ImplicitDefine); in buildSpillLoadStore()
1268 MIB.addReg(ValueReg, RegState::ImplicitDefine); in buildSpillLoadStore()
1365 MIB.addReg(SB.SuperReg, RegState::ImplicitDefine); in spillSGPR()
1464 MIB.addReg(SB.SuperReg, RegState::ImplicitDefine); in restoreSGPR()
1498 MIB.addReg(SB.SuperReg, RegState::ImplicitDefine); in restoreSGPR()
H A DSILowerControlFlow.cpp228 .addReg(Exec, RegState::ImplicitDefine); in emitIf()
H A DSIInstrInfo.cpp1863 .addReg(VecReg, RegState::ImplicitDefine) in expandPostRAPseudo()
1897 .addReg(VecReg, RegState::ImplicitDefine) in expandPostRAPseudo()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZElimCompare.cpp236 MIB.addReg(SystemZ::CC, RegState::ImplicitDefine | RegState::Dead); in convertToBRCT()
682 RegState::ImplicitDefine | RegState::Dead); in fuseCompareOperations()
H A DSystemZShortenInst.cpp147 .addReg(SystemZ::CC, RegState::ImplicitDefine | RegState::Dead); in shortenOn001AddCC()
H A DSystemZFrameLowering.cpp308 MIB.addReg(Reg, RegState::ImplicitDefine); in restoreCalleeSavedRegisters()
H A DSystemZInstrInfo.cpp223 .addReg(Reg64, RegState::ImplicitDefine); in expandLoadStackGuard()
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DMachineInstrBuilder.h63 ImplicitDefine = Implicit | Define, enumerator
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kInstrInfo.cpp536 .addReg(Reg, RegState::ImplicitDefine) in ExpandMOVEM()
H A DM68kFrameLowering.cpp891 I.addReg(Info.getReg(), RegState::ImplicitDefine); in restoreCalleeSavedRegisters()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DThumb2InstrInfo.cpp243 MIB.addReg(DestReg, RegState::ImplicitDefine); in loadRegFromStackSlot()
H A DARMFrameLowering.cpp1523 .addReg(SupReg, RegState::ImplicitDefine) in emitAlignedDPRCS2Restores()
1540 .addReg(SupReg, RegState::ImplicitDefine) in emitAlignedDPRCS2Restores()
H A DARMExpandPseudoInsts.cpp676 MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead)); in ExpandVLD()
844 MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead)); in ExpandLaneOp()
2577 MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead)); in ExpandMI()
H A DARMBaseInstrInfo.cpp1424 MIB.addReg(DestReg, RegState::ImplicitDefine); in loadRegFromStackSlot()
1470 MIB.addReg(DestReg, RegState::ImplicitDefine); in loadRegFromStackSlot()
1494 MIB.addReg(DestReg, RegState::ImplicitDefine); in loadRegFromStackSlot()
1514 MIB.addReg(DestReg, RegState::ImplicitDefine); in loadRegFromStackSlot()
H A DARMLoadStoreOptimizer.cpp958 MIB.addReg(ImpDef, RegState::ImplicitDefine); in MergeOpsUpdate()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsFastISel.cpp2139 .addReg(Mips::HI0, RegState::ImplicitDefine | RegState::Dead) in fastEmitInst_rr()
2140 .addReg(Mips::LO0, RegState::ImplicitDefine | RegState::Dead); in fastEmitInst_rr()
H A DMipsSEInstrInfo.cpp134 .addReg(DestReg, RegState::ImplicitDefine); in copyPhysReg()
H A DMipsSEISelDAGToDAG.cpp57 IsDef ? RegState::ImplicitDefine : RegState::Implicit | RegState::Undef; in addDSPCtrlRegOperands()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.cpp2189 .addReg(Pred[1].getReg(), RegState::ImplicitDefine); in PredicateInstruction()
2212 .addReg(Pred[1].getReg(), RegState::ImplicitDefine); in PredicateInstruction()
2269 .addReg(isPPC64 ? PPC::LR8 : PPC::LR, RegState::ImplicitDefine); in PredicateInstruction()
3198 .addImm(LII.Imm).addReg(PPC::CR0, RegState::ImplicitDefine); in replaceInstrWithLI()
H A DPPCISelLowering.cpp12437 .addReg(PPC::RM, RegState::ImplicitDefine); in EmitInstrWithCustomInserter()
12441 .addReg(PPC::RM, RegState::ImplicitDefine); in EmitInstrWithCustomInserter()
12508 .addReg(PPC::RM, RegState::ImplicitDefine); in EmitInstrWithCustomInserter()
12512 .addReg(PPC::RM, RegState::ImplicitDefine); in EmitInstrWithCustomInserter()
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DInstrEmitter.cpp1038 MIB.addReg(ScratchRegs[i], RegState::ImplicitDefine | in EmitMachineNode()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrInfo.cpp4754 MIB.addReg(SrcReg, RegState::ImplicitDefine); in expandPostRAPseudo()
4783 MIB.addReg(SrcReg, RegState::ImplicitDefine); in expandPostRAPseudo()
4858 MIB.addReg(Reg, RegState::ImplicitDefine); in expandPostRAPseudo()
5321 .addReg(Reg, RegState::ImplicitDefine); in breakPartialRegDependency()
5330 .addReg(Reg, RegState::ImplicitDefine); in breakPartialRegDependency()
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/MIRParser/
H A DMIParser.cpp1539 Flags |= RegState::ImplicitDefine; in parseRegisterFlag()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEISelLowering.cpp2439 MIB.addReg(Reg, RegState::ImplicitDefine | RegState::Dead); in emitSjLjDispatchBlock()

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