| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSplitConst32AndConst64.cpp | 80 uint64_t ImmValue = MI.getOperand(1).getImm(); in runOnMachineFunction() local 83 .addImm(ImmValue); in runOnMachineFunction() 87 int64_t ImmValue = MI.getOperand(1).getImm(); in runOnMachineFunction() local 92 int32_t LowWord = (ImmValue & 0xFFFFFFFF); in runOnMachineFunction() 93 int32_t HighWord = (ImmValue >> 32) & 0xFFFFFFFF; in runOnMachineFunction()
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| H A D | HexagonHardwareLoops.cpp | 655 int Mask = 0, ImmValue = 0; in getLoopTripCount() local 657 TII->analyzeCompare(*CondI, CmpReg1, CmpReg2, Mask, ImmValue); in getLoopTripCount()
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| H A D | HexagonInstrInfo.cpp | 2096 int ImmValue = MO.getImm(); in isConstExtended() local 2098 return (ImmValue < MinValue || ImmValue > MaxValue); in isConstExtended()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelDAGToDAG.cpp | 553 APInt ImmValue; in selectVSplatCommon() local 560 ImmValue.getBitWidth() == EltTy.getSizeInBits()) { in selectVSplatCommon() 563 (!Signed && ImmValue.isIntN(ImmBitSize))) { in selectVSplatCommon() 629 APInt ImmValue; in selectVSplatUimmPow2() local 637 int32_t Log2 = ImmValue.exactLogBase2(); in selectVSplatUimmPow2() 660 APInt ImmValue; in selectVSplatMaskL() local 671 if (ImmValue == ~(~ImmValue & ~(~ImmValue + 1))) { in selectVSplatMaskL() 694 APInt ImmValue; in selectVSplatMaskR() local 704 if (ImmValue == (ImmValue & ~(ImmValue + 1))) { in selectVSplatMaskR() 716 APInt ImmValue; in selectVSplatUimmInvPow2() local [all …]
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| H A D | MicroMipsSizeReduction.cpp | 528 int64_t ImmValue; in ReduceADDIUToADDIUSP() local 529 if (!GetImm(MI, Entry.ImmField(), ImmValue)) in ReduceADDIUToADDIUSP() 532 if (!AddiuspImmValue(ImmValue)) in ReduceADDIUToADDIUSP()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 2710 if (isInt<32>(ImmValue) || isUInt<32>(ImmValue)) { in loadImmediate() 2714 ImmValue = SignExtend64<32>(ImmValue); in loadImmediate() 2769 if (isInt<32>(ImmValue) || isUInt<32>(ImmValue)) { in loadImmediate() 4228 if (isRem && (ImmValue == 1 || (Signed && (ImmValue == -1)))) { in expandDivRem() 5063 else if ((ImmValue >= 1) && (ImmValue <= 32)) { in expandDRotationImm() 5094 if ((ImmValue >= 1) && (ImmValue <= 31)) { in expandDRotationImm() 5102 if ((ImmValue >= 33) && (ImmValue <= 63)) { in expandDRotationImm() 5108 if ((ImmValue >= 1) && (ImmValue <= 31)) { in expandDRotationImm() 5116 if ((ImmValue >= 33) && (ImmValue <= 63)) { in expandDRotationImm() 5494 if (ImmValue > -0x8000 && ImmValue < 0) { in expandSneI() [all …]
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Object/ |
| H A D | MachOObjectFile.cpp | 3193 RebaseType = ImmValue; in moveNext() 3207 SegmentIndex = ImmValue; in moveNext() 3274 Count = ImmValue; in moveNext() 3275 if (ImmValue != 0) in moveNext() 3276 RemainingLoopCount = ImmValue - 1; in moveNext() 3550 Ordinal = ImmValue; in moveNext() 3552 if (ImmValue > O->getLibraryCount()) { in moveNext() 3607 if (ImmValue) { in moveNext() 3627 Flags = ImmValue; in moveNext() 3653 BindType = ImmValue; in moveNext() [all …]
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/Utils/ |
| H A D | AArch64BaseInfo.h | 361 uint16_t ImmValue; member 363 : SysAlias(N, E), ImmValue(I) {} in SysAliasImm() 365 : SysAlias(N, E, F), ImmValue(I) {} in SysAliasImm()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Sparc/AsmParser/ |
| H A D | SparcAsmParser.cpp | 576 int32_t ImmValue = RawImmValue; in expandSET() local 581 IsImm && ((is64Bit() ? 0 : -4096) <= ImmValue && ImmValue < 4096); in expandSET() 584 ValExpr = MCConstantExpr::create(ImmValue, getContext()); in expandSET() 614 if (!IsImm || IsEffectivelyImm13 || (ImmValue & 0x3ff)) { in expandSET()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.cpp | 206 unsigned SrcReg2, int ImmValue, in isRedundantFlagInstr() argument 221 OI->getOperand(2).getImm() == ImmValue) in isRedundantFlagInstr()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 2065 uint64_t ImmValue = 0; in FoldOperand() local 2077 ImmValue = FPC->getValueAPF().bitcastToAPInt().getZExtValue(); in FoldOperand() 2087 ImmValue = Value; in FoldOperand() 2100 Imm = DAG.getTargetConstant(ImmValue, SDLoc(ParentNode), MVT::i32); in FoldOperand()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 2577 int32_t ImmValue = cast<ConstantSDNode>(N->getOperand(3))->getZExtValue(); in SelectMVE_WB() local 2578 Ops.push_back(getI32Imm(ImmValue, Loc)); // immediate offset in SelectMVE_WB() 2612 int32_t ImmValue = cast<ConstantSDNode>(N->getOperand(3))->getZExtValue(); in SelectMVE_LongShift() local 2613 Ops.push_back(getI32Imm(ImmValue, Loc)); // immediate shift count in SelectMVE_LongShift() 2675 int32_t ImmValue = cast<ConstantSDNode>(N->getOperand(3))->getZExtValue(); in SelectMVE_VSHLC() local 2676 Ops.push_back(getI32Imm(ImmValue, Loc)); // immediate shift count in SelectMVE_VSHLC() 2865 int ImmValue = cast<ConstantSDNode>(ImmOp)->getZExtValue(); in SelectMVE_VxDUP() local 2866 Ops.push_back(getI32Imm(ImmValue, Loc)); in SelectMVE_VxDUP()
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| H A D | ARMBaseInstrInfo.cpp | 2835 int ImmValue, const MachineInstr *OI, in isRedundantFlagInstr() argument 2859 OI->getOperand(2).getImm() == ImmValue) { in isRedundantFlagInstr() 2867 OI->getOperand(3).getImm() == ImmValue) { in isRedundantFlagInstr()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SystemOperands.td | 102 let SearchableFields = ["Name", "Encoding", "ImmValue"]; 107 bits<5> ImmValue = immValue;
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 3995 int ImmMask, int ImmValue, in isRedundantFlagInstr() argument 4020 OI.getOperand(2).getImm() == ImmValue) in isRedundantFlagInstr()
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