| /freebsd-13.1/share/mk/ |
| H A D | bsd.incs.mk | 79 installincludes: _${group}INS 80 _${group}INS: ${_${group}INCS}
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kInstrData.td | 498 class MxMoveToCCR<dag INS, MxEncEA EA, MxEncExt EXT> 499 : MxInst<(outs CCRC:$dst), INS, "move.w\t$src, $dst", [], 504 class MxMoveToCCRPseudo<dag INS> : MxPseudo<(outs CCRC:$dst), INS>; 522 class MxMoveFromCCR<dag OUTS, dag INS, MxEncEA EA, MxEncExt EXT> 523 : MxInst<OUTS, INS, "move.w\t$src, $dst", [], 529 class MxMoveFromCCRPseudo<dag INS> : MxPseudo<(outs), INS>;
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEFrameLowering.cpp | 657 BuildMI(MBB, MBBI, DL, STI.getInstrInfo()->get(Mips::INS), Mips::K1) in emitInterruptPrologueStub() 665 BuildMI(MBB, MBBI, DL, STI.getInstrInfo()->get(Mips::INS), Mips::K1) in emitInterruptPrologueStub() 674 BuildMI(MBB, MBBI, DL, STI.getInstrInfo()->get(Mips::INS), Mips::K1) in emitInterruptPrologueStub()
|
| H A D | MipsSEISelDAGToDAG.cpp | 247 SDNode *DSPCFWithCarry = CurDAG->getMachineNode(Mips::INS, DL, MVT::i32, Ops); in selectAddE() 258 CurDAG->getMachineNode(Mips::INS, DL, MVT::i32, InsOps); in selectAddE() 995 Opcode = Mips::INS; in trySelect()
|
| H A D | MipsInstrInfo.cpp | 766 case Mips::INS: in verifyInstruction()
|
| H A D | MipsSchedule.td | 137 def II_INS : InstrItinClass; // Any INS instruction
|
| H A D | MipsScheduleP5600.td | 206 def : InstRW<[P5600WriteAL2BitExt], (instrs EXT, INS)>;
|
| H A D | MipsScheduleGeneric.td | 48 CLO, CLZ, EXT, INS, LEA_ADDiu, LUi, NOP,
|
| H A D | MipsInstrInfo.td | 2419 def INS : MMRel, StdMMR6Rel, InsBase<"ins", GPR32Opnd, uimm5,
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SchedTSV110.td | 645 def : InstRW<[TSV110Wr_2cyc_1FSU1_1FSU2], (instregex "^(DUP|INS)v.+lane")>; 653 def : InstRW<[TSV110Wr_4cyc_1F], (instregex "^(INS|DUP)v.+gpr")>;
|
| H A D | AArch64SchedCyclone.td | 346 // INS V[x],V[y] is a WriteV. 356 // INS V[x],R
|
| H A D | AArch64InstrInfo.td | 5274 // AdvSIMD INS/DUP instructions 5439 defm INS : SIMDIns; 5563 // index type and INS extension 5590 ValueType VTScal, Instruction INS> { 5594 (INS V128:$src, imm:$Immd, V128:$Rn, imm:$Immn)>; 5599 (INS V128:$src, imm:$Immd, 5605 (EXTRACT_SUBREG (INS (SUBREG_TO_REG (i64 0), V64:$src, dsub), 5613 (INS (SUBREG_TO_REG (i64 0), V64:$src, dsub), imm:$Immd, 5648 // INS.
|
| H A D | AArch64InstrFormats.td | 7197 // AdvSIMD INS/DUP instructions 7445 // For all forms of the INS instruction, the "mov" mnemonic is the
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | CodeGenPrepare.cpp | 6872 SmallPtrSet<const Instruction *, 2> INS; in optimizeSelectInst() local 6873 INS.insert(ASI.begin(), ASI.end()); in optimizeSelectInst() 6882 PN->addIncoming(getTrueOrFalseValue(SI, true, INS), TrueBlock); in optimizeSelectInst() 6883 PN->addIncoming(getTrueOrFalseValue(SI, false, INS), FalseBlock); in optimizeSelectInst() 6888 INS.erase(SI); in optimizeSelectInst()
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.td | 2255 // Repeat (used with INS, OUTS, MOVS, LODS and STOS)
|
| /freebsd-13.1/contrib/ncurses/misc/ |
| H A D | terminfo.src | 16725 # appears that we cannot use naked INS LINE feature since it uses
|