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Searched refs:IMM (Results 1 – 23 of 23) sorted by relevance

/freebsd-13.1/contrib/llvm-project/compiler-rt/lib/builtins/arm/
H A Dudivsi3.S183 #define IMM # macro
199 lsls r2, r1, IMM shift; \
214 cmp r0, r1, lsl IMM shift; \
216 WIDE(addhs) r3, r3, IMM (1 << shift); \
217 WIDE(subhs) r0, r0, r1, lsl IMM shift
H A Dudivmodsi4.S110 #define IMM # macro
113 cmp r0, r1, lsl IMM shift; \
115 WIDE(addhs) r3, r3, IMM (1 << shift); \
116 WIDE(subhs) r0, r0, r1, lsl IMM shift
H A Dumodsi3.S102 #define IMM # macro
105 cmp r0, r1, lsl IMM shift; \
107 WIDE(subhs) r0, r0, r1, lsl IMM shift
/freebsd-13.1/sys/contrib/libsodium/src/libsodium/crypto_stream/chacha20/dolbeau/
H A Du4.h2 #define VEC4_ROT(A, IMM) \ argument
3 _mm_or_si128(_mm_slli_epi32(A, IMM), _mm_srli_epi32(A, (32 - IMM)))
H A Du8.h2 #define VEC8_ROT(A, IMM) \ argument
3 _mm256_or_si256(_mm256_slli_epi32(A, IMM), _mm256_srli_epi32(A, (32 - IMM)))
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYInstrFormats.td72 // Format< OP[6] | RZ[5] | RX[5] | IMM[16] >
86 // Format< OP[6] | SOP[5] | RZ[5] | IMM[16] >
136 // Format< OP[6] | SOP[5] | RX[5] | 00000000000000[14] | IMM[2] >
202 // Format< OP[6] | RZ[5] | RX[5] | SOP[4] | IMM[12] >
254 // Format< OP[6] | RZ[5] | RX[5] | SOP[6] | PCODE[5] | IMM[5]>
272 // Format< OP[6] | IMM[5] | RX[5] | SOP[6] | PCODE[5] | RZ[5]>
289 // Format< OP[6] | RY[5] | RX[5] | SOP[6] | PCODE[5] | IMM[5]>
344 // Format< OP[6] | IMM[5] | RX[5] | SOP[6] | PCODE[5] | 00000 >
361 // Format< OP[6] | IMM[5] | 00000[5] | SOP[6] | PCODE[5] | RZ[5]>
/freebsd-13.1/sys/powerpc/powerpc/
H A Ddb_disasm.c869 u_int IMM; in disasm_fields() local
871 IMM = extract_field(instr, 31 - 31, 16); in disasm_fields()
872 if (IMM & 0x8000) { in disasm_fields()
874 IMM = 0x10000-IMM; in disasm_fields()
879 IMM = extract_field(instr, 31 - 31, 16); in disasm_fields()
883 APP_PSTR("0x%x", IMM); in disasm_fields()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kInstrBits.td46 class MxBTSTEnc_I<MxBead8Imm IMM, MxEncEA EA, MxEncExt EXT>
48 MxBead4Bits<0b1000>, MxBead4Bits<0b0000>, IMM,
H A DM68kInstrShiftRotate.td38 /// 1 1 1 0 | REG/IMM | D | SIZE |R/I| OP | REG
H A DM68kInstrData.td427 MxBead16Imm IMM>
429 MxBead1Bit<1>, MxBead4Bits<0b0100>, IMM,
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrPrefix.td257 // X-Form: [PO T IMM VRB XO TX]
263 bits<5> IMM;
267 let Inst{11-15} = IMM;
281 bits<8> IMM;
291 let Inst{24-31} = IMM;
477 bits<3> IMM;
486 let Inst{29-31} = IMM;
2221 vsrc:$XC, u8imm:$IMM),
2532 def : Pat<(v16i8 (int_ppc_vsx_xxgenpcvbm v16i8:$VRB, imm:$IMM)),
2534 def : Pat<(v8i16 (int_ppc_vsx_xxgenpcvhm v8i16:$VRB, imm:$IMM)),
[all …]
H A DPPCInstrFormats.td1981 bits<5> IMM;
1986 let Inst{11-15} = IMM;
H A DPPCInstr64Bit.td1836 def : Pat<(int_ppc_tdw g8rc:$A, g8rc:$B, i32:$IMM),
1837 (TD $IMM, $A, $B)>;
H A DPPCInstrVSX.td3823 def : Pat<(v4i32 (int_ppc_vsx_xxinsertw v4i32:$A, v2i64:$B, imm:$IMM)),
3824 (v4i32 (XXINSERTW $A, $B, imm:$IMM))>;
3825 def : Pat<(v2i64 (int_ppc_vsx_xxextractuw v2i64:$A, imm:$IMM)),
3826 (v2i64 (COPY_TO_REGCLASS (XXEXTRACTUW $A, imm:$IMM), VSRC))>;
H A DPPCInstrAltivec.td846 let IMM=-1 in {
H A DPPCInstrInfo.td5478 def : Pat<(int_ppc_tw gprc:$A, gprc:$B, i32:$IMM),
5479 (TW $IMM, $A, $B)>;
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZPatterns.td40 // respectively. MODE is the addressing mode and IMM is the type
49 // memory location. IMM is the type of the second operand.
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSMInstructions.td776 // 1. IMM offset
782 // 2. 32-bit IMM offset on CI
810 // 2. 32-bit IMM offset on CI
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMScheduleSwift.td366 (instregex "LD(RB|R)(_|T_)(POST|PRE)_(IMM|REG)", "LDRH(_PRE|_POST)",
367 "LDR(T|BT)_POST_(REG|IMM)", "LDRHT(i|r)",
H A DARMScheduleR52.td298 (instregex "LD(RB|R)(_|T_)(POST|PRE)_(IMM|REG)", "LDRH(_PRE|_POST)",
299 "LDRBT_POST$", "LDR(T|BT)_POST_(REG|IMM)", "LDRHT(i|r)",
/freebsd-13.1/sys/cddl/dev/dtrace/x86/
H A Ddis_tables.c5390 enum {IMM, DISP}; enumerator
5515 IMM, TRY_NEG) && in dtrace_disx86_str()
5581 IMM, POS); in dtrace_disx86_str()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp6831 const ARMOperand &IMM = static_cast<ARMOperand &>(*Operands[4]); in shouldOmitCCOutOperand() local
6832 if (IMM.isT2SOImm() || IMM.isT2SOImmNeg()) in shouldOmitCCOutOperand()
6834 if (const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(IMM.getImm())) { in shouldOmitCCOutOperand()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXIntrinsics.td1213 Operand IMMType, SDNode IMM, list<Predicate> Pred> {
1220 [(set regclass:$dst, (IntOp ptrclass:$addr, IMM:$b))]>,
1224 string OpcStr, PatFrag IntOp, Operand IMMType, SDNode IMM,
1227 IntOp, IMMType, IMM, Pred>;
1229 IntOp, IMMType, IMM, Pred>;