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Searched refs:HalfVT (Results 1 – 13 of 13) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DValueTypes.h397 EVT HalfVT = EVT((MVT::SimpleValueType)IntVT); in getHalfSizedIntegerVT() local
398 if (HalfVT.getSizeInBits() * 2 >= EVTSize) in getHalfSizedIntegerVT()
399 return HalfVT; in getHalfSizedIntegerVT()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp1830 EVT HalfVT = VT.getHalfSizedIntegerVT(*DAG.getContext()); in LowerUDIVREM64() local
1832 SDValue One = DAG.getConstant(1, DL, HalfVT); in LowerUDIVREM64()
1833 SDValue Zero = DAG.getConstant(0, DL, HalfVT); in LowerUDIVREM64()
1847 SDValue Res = DAG.getNode(ISD::UDIVREM, DL, DAG.getVTList(HalfVT, HalfVT), in LowerUDIVREM64()
1891 SDVTList HalfCarryVT = DAG.getVTList(HalfVT, MVT::i1); in LowerUDIVREM64()
2006 const unsigned halfBitWidth = HalfVT.getSizeInBits(); in LowerUDIVREM64()
2010 SDValue POS = DAG.getConstant(bitPos, DL, HalfVT); in LowerUDIVREM64()
2013 HBit = DAG.getNode(ISD::AND, DL, HalfVT, HBit, One); in LowerUDIVREM64()
2021 SDValue BIT = DAG.getConstant(1ULL << bitPos, DL, HalfVT); in LowerUDIVREM64()
2111 EVT HalfVT = VT.getHalfSizedIntegerVT(*DAG.getContext()); in LowerSDIVREM() local
[all …]
H A DSIISelLowering.cpp5639 EVT HalfVT = MVT::getVectorVT(VT.getVectorElementType().getSimpleVT(), 2); in lowerBUILD_VECTOR() local
5643 SDValue Lo = DAG.getBuildVector(HalfVT, SL, in lowerBUILD_VECTOR()
5645 SDValue Hi = DAG.getBuildVector(HalfVT, SL, in lowerBUILD_VECTOR()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InterleavedAccess.cpp372 MVT HalfVT = scaleVectorType(VT); in interleave8bitStride4() local
390 createUnpackShuffleMask(HalfVT, MaskLowTemp, true, false); in interleave8bitStride4()
391 createUnpackShuffleMask(HalfVT, MaskHighTemp, false, false); in interleave8bitStride4()
H A DX86ISelLowering.cpp8679 EVT HalfVT = in EltsFromConsecutiveLoads() local
9775 MVT HalfVT = VT.getHalfNumVectorElementsVT(); in getHopForBuildVector() local
16437 MVT HalfVT = VT.getHalfNumVectorElementsVT(); in getShuffleHalfVectors() local
16442 return DAG.getUNDEF(HalfVT); in getShuffleHalfVectors()
16455 SDValue Op1 = DAG.getUNDEF(HalfVT); in getShuffleHalfVectors()
16485 MVT HalfVT = VT.getHalfNumVectorElementsVT(); in lowerShuffleWithUndefHalf() local
20844 MVT HalfVT = VT.getHalfNumVectorElementsVT(); in LowerAVXExtend() local
20857 OpHi = DAG.getBitcast(HalfVT, OpHi); in LowerAVXExtend()
24202 MVT HalfVT = VT.getHalfNumVectorElementsVT(); in LowerEXTEND_VECTOR_INREG() local
24212 Hi = DAG.getNode(Opc, dl, HalfVT, Hi); in LowerEXTEND_VECTOR_INREG()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeTypes.cpp1040 EVT HalfVT = in SplitInteger() local
1042 SplitInteger(Op, HalfVT, HalfVT, Lo, Hi); in SplitInteger()
H A DLegalizeIntegerTypes.cpp3995 EVT HalfVT = LHSLow.getValueType(); in ExpandIntRes_XMULO() local
3997 SDVTList VTHalfWithO = DAG.getVTList(HalfVT, BitVT); in ExpandIntRes_XMULO()
3999 SDValue HalfZero = DAG.getConstant(0, dl, HalfVT); in ExpandIntRes_XMULO()
4010 SDValue HighSum = DAG.getNode(ISD::ADD, dl, HalfVT, One, Two); in ExpandIntRes_XMULO()
4211 EVT HalfVT = in ExpandIntRes_VSCALE() local
4216 APInt One(HalfVT.getSizeInBits(), 1); in ExpandIntRes_VSCALE()
4217 SDValue VScaleBase = DAG.getVScale(dl, HalfVT, One); in ExpandIntRes_VSCALE()
H A DLegalizeVectorTypes.cpp2838 EVT HalfVT = EVT::getVectorVT(*DAG.getContext(), HalfElementVT, in SplitVecOp_TruncateHelper() local
2845 HalfLo = DAG.getNode(N->getOpcode(), DL, {HalfVT, MVT::Other}, in SplitVecOp_TruncateHelper()
2847 HalfHi = DAG.getNode(N->getOpcode(), DL, {HalfVT, MVT::Other}, in SplitVecOp_TruncateHelper()
2854 HalfLo = DAG.getNode(N->getOpcode(), DL, HalfVT, InLoVec); in SplitVecOp_TruncateHelper()
2855 HalfHi = DAG.getNode(N->getOpcode(), DL, HalfVT, InHiVec); in SplitVecOp_TruncateHelper()
H A DDAGCombiner.cpp5184 EVT HalfVT = EVT::getIntegerVT(*DAG.getContext(), Size / 2); in visitANDLike() local
5190 TLI.isNarrowingProfitable(VT, HalfVT) && in visitANDLike()
5191 TLI.isTypeDesirableForOp(ISD::AND, HalfVT) && in visitANDLike()
5192 TLI.isTypeDesirableForOp(ISD::SRL, HalfVT) && in visitANDLike()
5193 TLI.isTruncateFree(VT, HalfVT) && in visitANDLike()
5194 TLI.isZExtFree(HalfVT, VT)) { in visitANDLike()
5205 SDValue Trunc = DAG.getNode(ISD::TRUNCATE, SL, HalfVT, in visitANDLike()
20622 if (!TLI.isShuffleMaskLegal(Mask0, HalfVT) || in foldShuffleOfConcatUndefs()
20623 !TLI.isShuffleMaskLegal(Mask1, HalfVT)) in foldShuffleOfConcatUndefs()
20630 SDValue Shuf0 = DAG.getVectorShuffle(HalfVT, DL, X, Y, Mask0); in foldShuffleOfConcatUndefs()
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H A DTargetLowering.cpp1849 EVT HalfVT = Op.getOperand(0).getValueType(); in SimplifyDemandedBits() local
1850 unsigned HalfBitWidth = HalfVT.getScalarSizeInBits(); in SimplifyDemandedBits()
8578 EVT HalfVT = VT.getHalfNumVectorElementsVT(*DAG.getContext()); in expandVecReduce() local
8579 if (!isOperationLegalOrCustom(BaseOpcode, HalfVT)) in expandVecReduce()
8584 Op = DAG.getNode(BaseOpcode, dl, HalfVT, Lo, Hi); in expandVecReduce()
8585 VT = HalfVT; in expandVecReduce()
H A DSelectionDAGBuilder.cpp196 EVT HalfVT = EVT::getIntegerVT(*DAG.getContext(), RoundBits/2); in getCopyFromParts() local
200 PartVT, HalfVT, V); in getCopyFromParts()
202 RoundParts / 2, PartVT, HalfVT, V); in getCopyFromParts()
204 Lo = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[0]); in getCopyFromParts()
205 Hi = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[1]); in getCopyFromParts()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp16796 MVT ExtVT, HalfVT; in PerformMinMaxCombine() local
16798 HalfVT = MVT::v8i16; in PerformMinMaxCombine()
16801 HalfVT = MVT::v16i8; in PerformMinMaxCombine()
16809 DAG.getNode(ARMISD::VQMOVNs, DL, HalfVT, DAG.getUNDEF(HalfVT), in PerformMinMaxCombine()
16836 MVT HalfVT; in PerformMinMaxCombine() local
16839 HalfVT = MVT::v8i16; in PerformMinMaxCombine()
16842 HalfVT = MVT::v16i8; in PerformMinMaxCombine()
16850 DAG.getNode(ARMISD::VQMOVNu, DL, HalfVT, DAG.getUNDEF(HalfVT), N0, in PerformMinMaxCombine()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp11473 auto *HalfVT = cast<FixedVectorType>(HalfV->getType()); in areExtractShuffleVectors() local
11474 return FullVT->getNumElements() == 2 * HalfVT->getNumElements(); in areExtractShuffleVectors()
14975 EVT HalfVT = VT.getHalfNumVectorElementsVT(*DAG.getContext()); in splitStores() local
14976 unsigned NumElts = HalfVT.getVectorNumElements(); in splitStores()
14977 SDValue SubVector0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, HalfVT, StVal, in splitStores()
14979 SDValue SubVector1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, HalfVT, StVal, in splitStores()
18065 EVT HalfVT = VT.getHalfNumVectorElementsVT(*DAG.getContext()); in LowerFixedLengthVectorIntDivideToSVE() local
18066 EVT FixedWidenedVT = HalfVT.widenIntegerVectorElementType(*DAG.getContext()); in LowerFixedLengthVectorIntDivideToSVE()