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Searched refs:GLC (Results 1 – 14 of 14) sorted by relevance

/freebsd-13.1/sys/contrib/ck/include/
H A Dck_cohort.h53 #define CK_COHORT_TRYLOCK(N, C, GLC, LLC, LUC) ck_cohort_##N##_trylock(C, GLC, LLC, LUC) argument
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIDefines.h282 GLC = 1, enumerator
286 ALL = GLC | SLC | DLC | SCC
H A DSIInstrFormats.td265 int GLC = 0;
301 let Inst{13} = cpol{CPolBit.GLC};
H A DSMInstructions.td517 let Inst{16} = !if(ps.has_glc, cpol{CPolBit.GLC}, ?);
617 let cpol{CPolBit.GLC} = ps.glc;
894 let Inst{16} = !if(ps.has_glc, cpol{CPolBit.GLC}, ?);
993 let cpol{CPolBit.GLC} = ps.glc;
H A DBUFInstructions.td1896 let Inst{14} = !if(ps.has_glc, cpol{CPolBit.GLC}, ps.glc_value);
2181 let Inst{14} = !if(ps.has_glc, cpol{CPolBit.GLC}, ps.glc_value);
2278 let Inst{14} = !if(ps.has_glc, cpol{CPolBit.GLC}, ps.glc_value);
2370 let Inst{14} = !if(ps.has_glc, cpol{CPolBit.GLC}, ps.glc_value);
2512 let Inst{14} = !if(ps.has_glc, cpol{CPolBit.GLC}, ps.glc_value);
2565 let Inst{14} = !if(ps.has_glc, cpol{CPolBit.GLC}, ps.glc_value);
H A DAMDGPUInstructionSelector.cpp1632 CPol |= AMDGPU::CPol::GLC; // TODO no-return optimization in selectImageIntrinsic()
2455 MIB.addImm(AMDGPU::CPol::GLC); in selectG_AMDGPU_ATOMIC_CMPXCHG()
4277 MIB.addImm(AMDGPU::CPol::GLC); // cpol in selectMUBUFAddr64Atomic()
4302 [=](MachineInstrBuilder &MIB) { MIB.addImm(AMDGPU::CPol::GLC); } // cpol in selectMUBUFOffsetAtomic()
4410 MIB.addImm(MI.getOperand(OpIdx).getImm() | AMDGPU::CPol::GLC); in renderSetGLC()
H A DSIMemoryLegalizer.cpp361 return enableNamedBit(MI, AMDGPU::CPol::GLC); in enableGLCBit()
H A DAMDGPUISelDAGToDAG.cpp2459 SDValue CPol = CurDAG->getTargetConstant(AMDGPU::CPol::GLC, SL, MVT::i32); in SelectATOMIC_CMP_SWAP()
2477 SDValue CPol = CurDAG->getTargetConstant(AMDGPU::CPol::GLC, SL, MVT::i32); in SelectATOMIC_CMP_SWAP()
H A DFLATInstructions.td129 let Inst{16} = !if(ps.has_glc, cpol{CPolBit.GLC}, ps.glcValue);
H A DSIInstrInfo.td836 return CurDAG->getTargetConstant(N->getZExtValue() | AMDGPU::CPol::GLC, SDLoc(N), MVT::i8);
H A DSIISelLowering.cpp6280 CPol |= AMDGPU::CPol::GLC; // TODO no-return optimization in lowerImage()
11364 CPol.setImm(CPol.getImm() & ~AMDGPU::CPol::GLC); in AdjustInstrPostInstrSelection()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp4159 (CPol & ~(AMDGPU::CPol::GLC | AMDGPU::CPol::DLC))) { in validateCoherencyBits()
4176 if (!(TSFlags & SIInstrFlags::MIMG) && !(CPol & CPol::GLC)) { in validateCoherencyBits()
4181 if (CPol & CPol::GLC) { in validateCoherencyBits()
5526 CPolOn = AMDGPU::CPol::GLC; in parseCPol()
5528 CPolOff = AMDGPU::CPol::GLC; in parseCPol()
7011 IsAtomicReturn = Op.getImm() & AMDGPU::CPol::GLC; in cvtMubufImpl()
7182 IsAtomicReturn = Op.getImm() & AMDGPU::CPol::GLC; in cvtSMEMAtomic()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUInstPrinter.cpp208 if (Imm & CPol::GLC) in printCPol()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp553 AMDGPU::CPol::GLC : 0; in getInstruction()