Home
last modified time | relevance | path

Searched refs:FalsePred (Results 1 – 6 of 6) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SchedPredExynos.td57 MCReturnStatement<FalsePred>>>;
73 MCReturnStatement<FalsePred>>>;
94 MCReturnStatement<FalsePred>>>;
108 MCReturnStatement<FalsePred>>>;
H A DAArch64SchedPredicates.td373 MCReturnStatement<FalsePred>>>;
383 MCReturnStatement<FalsePred>>>;
393 MCReturnStatement<FalsePred>>>;
405 MCReturnStatement<FalsePred>>>;
424 MCReturnStatement<FalsePred>>>;
440 MCReturnStatement<FalsePred>>>;
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86SchedPredicates.td56 MCOpcodeSwitchStatement<[LEACases], MCReturnStatement<FalsePred>>;
/freebsd-13.1/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombinePHI.cpp1255 BasicBlock *TruePred = nullptr, *FalsePred = nullptr; in SimplifyUsingControlFlow() local
1261 FalsePred = Pred; in SimplifyUsingControlFlow()
1263 assert(TruePred && FalsePred && "Must be!"); in SimplifyUsingControlFlow()
1278 BasicBlockEdge FalseIncEdge(FalsePred, BB); in SimplifyUsingControlFlow()
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/Target/
H A DTargetInstrPredicate.td79 def FalsePred : MCFalse;
321 class STIPredicateDecl<string name, MCInstPredicate default = FalsePred,
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMScheduleA57.td29 def IsR1P0AndLaterPred : MCSchedPredicate<FalsePred>;