| /freebsd-13.1/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | ConstrainedOps.def | 93 DAG_FUNCTION(round, 1, 0, experimental_constrained_round, FROUND)
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| /freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 883 FROUND, enumerator
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| H A D | BasicTTIImpl.h | 1623 ISDs.push_back(ISD::FROUND); in getTypeBasedIntrinsicInstrCost()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCTargetTransformInfo.cpp | 506 case Intrinsic::round: Opcode = ISD::FROUND; break; in mightUseCTR()
615 Opcode = ISD::FROUND; break; in mightUseCTR()
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| H A D | PPCISelLowering.cpp | 418 setOperationAction(ISD::FROUND, MVT::f64, Legal); in PPCTargetLowering()
423 setOperationAction(ISD::FROUND, MVT::f32, Legal); in PPCTargetLowering()
976 setOperationAction(ISD::FROUND, MVT::v2f64, Legal); in PPCTargetLowering()
977 setOperationAction(ISD::FROUND, MVT::f64, Legal); in PPCTargetLowering()
982 setOperationAction(ISD::FROUND, MVT::v4f32, Legal); in PPCTargetLowering()
983 setOperationAction(ISD::FROUND, MVT::f32, Legal); in PPCTargetLowering()
1176 setOperationAction(ISD::FROUND, MVT::f128, Legal); in PPCTargetLowering()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstrInfo.td | 263 def AMDGPUround : SDNode<"ISD::FROUND",
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| H A D | AMDGPUISelLowering.cpp | 335 setOperationAction(ISD::FROUND, MVT::f32, Custom); in AMDGPUTargetLowering()
336 setOperationAction(ISD::FROUND, MVT::f64, Custom); in AMDGPUTargetLowering()
1296 case ISD::FROUND: return LowerFROUND(Op, DAG); in LowerOperation()
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| H A D | AMDGPUISelDAGToDAG.cpp | 437 case ISD::FROUND: in fp16SrcZerosHighBits()
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| H A D | SIISelLowering.cpp | 598 setOperationAction(ISD::FROUND, MVT::f16, Custom); in SITargetLowering()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 213 case ISD::FROUND: return "fround"; in getOperationName()
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| H A D | LegalizeFloatTypes.cpp | 118 case ISD::FROUND: R = SoftenFloatRes_FROUND(N); break; in SoftenFloatResult()
1238 case ISD::FROUND: ExpandFloatRes_FROUND(N, Lo, Hi); break; in ExpandFloatResult()
2244 case ISD::FROUND: in PromoteFloatResult()
2609 case ISD::FROUND: in SoftPromoteHalfResult()
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| H A D | LegalizeVectorOps.cpp | 429 case ISD::FROUND: in LegalizeOp()
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| H A D | LegalizeVectorTypes.cpp | 98 case ISD::FROUND: in ScalarizeVectorResult()
993 case ISD::FROUND: in SplitVectorResult()
3121 case ISD::FROUND: in WidenVectorResult()
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| H A D | LegalizeDAG.cpp | 4021 case ISD::FROUND: in ConvertNodeToLibcall()
4720 case ISD::FROUND: in PromoteNode()
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| H A D | SelectionDAGBuilder.cpp | 6267 case Intrinsic::round: Opcode = ISD::FROUND; break; in visitIntrinsicCall()
8026 if (visitUnaryFloatCall(I, ISD::FROUND)) in visitCall()
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| H A D | SelectionDAG.cpp | 4353 case ISD::FROUND: in isKnownNeverNaN()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 541 setOperationAction(ISD::FROUND, MVT::f16, Promote); in NVPTXTargetLowering()
542 setOperationAction(ISD::FROUND, MVT::v2f16, Expand); in NVPTXTargetLowering()
543 setOperationAction(ISD::FROUND, MVT::f32, Custom); in NVPTXTargetLowering()
544 setOperationAction(ISD::FROUND, MVT::f64, Custom); in NVPTXTargetLowering()
2184 case ISD::FROUND: in LowerOperation()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 828 setOperationAction(ISD::FROUND, VT, Expand); in initActions()
899 setOperationAction(ISD::FROUND, VT, Expand); in initActions()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 631 setOperationAction(ISD::FROUND, MVT::f16, Promote); in AArch64TargetLowering()
651 setOperationAction(ISD::FROUND, MVT::v4f16, Expand); in AArch64TargetLowering()
676 setOperationAction(ISD::FROUND, MVT::v8f16, Expand); in AArch64TargetLowering()
696 setOperationAction(ISD::FROUND, Ty, Legal); in AArch64TargetLowering()
714 setOperationAction(ISD::FROUND, MVT::f16, Legal); in AArch64TargetLowering()
980 setOperationAction(ISD::FROUND, MVT::v1f64, Expand); in AArch64TargetLowering()
1121 setOperationAction(ISD::FROUND, Ty, Legal); in AArch64TargetLowering()
1132 setOperationAction(ISD::FROUND, Ty, Legal); in AArch64TargetLowering()
1282 setOperationAction(ISD::FROUND, VT, Custom); in AArch64TargetLowering()
1547 setOperationAction(ISD::FROUND, VT, Custom); in addTypeForFixedLengthSVE()
[all …]
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 461 setOperationAction(ISD::FROUND, VT, Legal); in SystemZTargetLowering()
518 setOperationAction(ISD::FROUND, MVT::v2f64, Legal); in SystemZTargetLowering()
550 setOperationAction(ISD::FROUND, MVT::v4f32, Legal); in SystemZTargetLowering()
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| /freebsd-13.1/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 490 def fround : SDNode<"ISD::FROUND" , SDTFPUnaryOp>;
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1644 ISD::FRINT, ISD::FNEARBYINT, ISD::FROUND, ISD::FFLOOR, in HexagonTargetLowering()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 157 setOperationAction(ISD::FROUND, MVT::f16, Promote); in MipsSETargetLowering()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 347 setOperationAction(ISD::FROUND, VT, Legal); in addMVEVectorTypes()
1446 setOperationAction(ISD::FROUND, MVT::f32, Legal); in ARMTargetLowering()
1462 setOperationAction(ISD::FROUND, MVT::f64, Legal); in ARMTargetLowering()
1486 setOperationAction(ISD::FROUND, MVT::f16, Legal); in ARMTargetLowering()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 1137 setOperationAction(ISD::FROUND, RoundedTy, Custom); in X86TargetLowering()
1239 setOperationAction(ISD::FROUND, VT, Custom); in X86TargetLowering()
1626 setOperationAction(ISD::FROUND, VT, Custom); in X86TargetLowering()
30497 case ISD::FROUND: return LowerFROUND(Op, DAG); in LowerOperation()
41080 case ISD::FROUND: in scalarizeExtEltFP()
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