Searched refs:FP16 (Results 1 – 10 of 10) sorted by relevance
1 //===--- arm_fp16.td - ARM FP16 compiler interface ------------------------===//9 // This file defines the TableGen definitions from which the ARM FP16 header16 // ARMv8.2-A FP16 intrinsics.
1651 // ARMv8.2-A FP16 vector intrinsics for A32/A64.1654 // ARMv8.2-A FP16 one-operand vector intrinsics.1692 // ARMv8.2-A FP16 two-operands vector intrinsics.1745 // ARMv8.2-A FP16 three-operands vector intrinsics.1751 // ARMv8.2-A FP16 lane vector intrinsics.1784 // ARMv8.2-A FP16 vector intrinsics for A64 only.1808 // ARMv8.2-A FP16 lane vector intrinsics.1859 // ARMv8.2-A FP16 reduction vector intrinsics.1891 // v8.2-A FP16 fused multiply-add long instructions.
88 "Full FP16", [FeatureFPARMv8]>;91 "Enable FP16 FML instructions", [FeatureFullFP16]>;
922 // ARMv8.2-A FP16 Fused Multiply-Add Long1032 // inside the multiclass as the FP16 versions need different predicates.6299 // Patterns for FP16 Instrinsics - requires reg copy to/from as i16s not supported.
1667 let isUnpredicable = 1; // FP16 instructions cannot in general be conditional2016 let isUnpredicable = 1; // FP16 instructions cannot in general be conditional2046 let isUnpredicable = 1; // FP16 instructions cannot in general be conditional2074 let isUnpredicable = 1; // FP16 instructions cannot in general be conditional2105 let isUnpredicable = 1; // FP16 instructions cannot in general be conditional
132 bool IsAddressingMode5(SDValue N, SDValue &Base, SDValue &Offset, bool FP16);981 bool FP16) { in IsAddressingMode5() argument1001 const int Scale = FP16 ? 2 : 4; in IsAddressingMode5()1017 if (FP16) in IsAddressingMode5()1029 if (FP16) in IsAddressingMode5()
41 // 16-bit FP loads/stores/moves, shared between VFP (with the v8.2A FP16
514 // v8.2-A FP16 Fused Multiply-Add Long
219 // FP16 ops are identified by accumulator & result type.
830 // Loads FP16 constant into a register.