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Searched refs:FP (Results 1 – 25 of 252) sorted by relevance

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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonEarlyIfConv.cpp465 if (BB == FP.SplitB || BB == FP.TrueB || BB == FP.FalseB) in computePhiCost()
508 if (MBPI && FP.TrueB && !FP.FalseB && in isProfitable()
513 if (MBPI && !FP.TrueB && FP.FalseB && in isProfitable()
518 if (FP.TrueB && FP.FalseB) { in isProfitable()
570 TotalPh = computePhiCost(FP.JoinB, FP); in isProfitable()
867 predicateBlockNB(FP.SplitB, OldTI, FP.TrueB, FP.PredR, true); in convert()
872 predicateBlockNB(FP.SplitB, At, FP.FalseB, FP.PredR, false); in convert()
879 FP.SplitB->erase(OldTI, FP.SplitB->end()); in convert()
896 if (T != FP.TrueB && T != FP.FalseB) { in convert()
911 FP.SplitB->addSuccessor(FP.JoinB); in convert()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMScheduleV6.td227 // Single-precision FP ALU
230 // Double-precision FP ALU
239 // Single-precision FP MAC
242 // Double-precision FP MAC
251 // Single-precision FP DIV
254 // Double-precision FP DIV
257 // Single-precision FP SQRT
260 // Double-precision FP SQRT
275 // Single-precision FP Load
281 // FP Load Multiple
[all …]
H A DARMScheduleA8.td302 // Single-precision FP ALU
306 // Double-precision FP ALU
320 // Single-precision FP MAC
324 // Double-precision FP MAC
338 // Single-precision FP DIV
343 // Double-precision FP DIV
348 // Single-precision FP SQRT
392 // FP Load Multiple
421 // FP Store Multiple
778 // Quad-register FP Unary
[all …]
H A DARMScheduleA9.td567 // Single-precision FP ALU
575 // Double-precision FP ALU
599 // Single-precision FP MAC
607 // Double-precision FP MAC
631 // Single-precision FP DIV
639 // Double-precision FP DIV
647 // Single-precision FP SQRT
717 // FP Load Multiple
755 // FP Store Multiple
1645 // Quad-register FP Unary
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetOptionsImpl.cpp33 StringRef FP = F.getFnAttribute("frame-pointer").getValueAsString(); in DisableFramePointerElim() local
34 if (FP == "all") in DisableFramePointerElim()
36 if (FP == "non-leaf") in DisableFramePointerElim()
38 if (FP == "none") in DisableFramePointerElim()
H A DRegisterUsageInfo.cpp60 const Function &FP, ArrayRef<uint32_t> RegMask) { in storeUpdateRegUsageInfo() argument
61 RegMasks[&FP] = RegMask; in storeUpdateRegUsageInfo()
65 PhysicalRegisterUsageInfo::getRegUsageInfo(const Function &FP) { in getRegUsageInfo() argument
66 auto It = RegMasks.find(&FP); in getRegUsageInfo()
H A DTargetSubtargetInfo.cpp22 const unsigned *FP) in TargetSubtargetInfo() argument
23 : MCSubtargetInfo(TT, CPU, TuneCPU, FS, PF, PD, WPR, WL, RA, IS, OC, FP) {} in TargetSubtargetInfo()
/freebsd-13.1/crypto/openssl/crypto/sha/asm/
H A Dkeccak1600-c64x.pl105 STDW A3:A2,*FP[-7]
410 || STDW A13:A12,*FP[-4]
412 || STDW A11:A10,*FP[-5]
414 || STW A14,*FP[-6]
524 || LDW *FP[-6],A14
563 || STW A14,*FP[-6]
722 || LDW *FP[-6],A14
765 || STW A14,*FP[-2]
766 STDW A13:A12,*FP[-2]
838 LDDW *FP[-2],A13:A12
[all …]
/freebsd-13.1/sys/arm/arm/
H A Ddb_trace.c87 state->registers[SP], state->registers[FP]); in db_stack_trace_cmd()
91 ~((1 << SP) | (1 << FP) | (1 << LR) | (1 << PC)); in db_stack_trace_cmd()
146 state.registers[FP] = ctx->pcb_regs.sf_r11; in db_trace_thread()
166 state.registers[FP] = (uint32_t)__builtin_frame_address(0); in db_trace_self()
H A Dstack_machdep.c61 state.registers[FP] = (uint32_t)__builtin_frame_address(0); in stack_save()
81 state.registers[FP] = td->td_pcb->pcb_regs.sf_r11; in stack_save_td()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/WebAssembly/MCTargetDesc/
H A DWebAssemblyInstPrinter.cpp268 static std::string toString(const APFloat &FP) { in toString() argument
270 if (FP.isNaN() && !FP.bitwiseIsEqual(APFloat::getQNaN(FP.getSemantics())) && in toString()
271 !FP.bitwiseIsEqual( in toString()
272 APFloat::getQNaN(FP.getSemantics(), /*Negative=*/true))) { in toString()
273 APInt AI = FP.bitcastToAPInt(); in toString()
284 auto Written = FP.convertToHexString( in toString()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SchedThunderX3T110.td1198 // FP absolute value
1199 // FP min/max
1200 // FP negate
1206 // FP arithmetic
1209 // FP compare
1215 // FP Mul, Div, Sqrt
1251 // FP divide, S-form
1267 // FP multiply
1295 // FP select
1310 // FP move, immed
[all …]
H A DAArch64SchedThunderX2T99.td39 // Port 0: ALU, FP/SIMD.
1091 // FP absolute value
1092 // FP min/max
1093 // FP negate
1099 // FP arithmetic
1102 // FP compare
1108 // FP Mul, Div, Sqrt
1160 // FP multiply
1188 // FP select
1203 // FP move, immed
[all …]
H A DAArch64SchedExynosM3.td44 def M3PipeF0 : ProcResource<1>; // FP #0
236 // FP data instructions.
243 // FP miscellaneous instructions.
248 // FP load instructions.
251 // FP store instructions.
256 // ASIMD FP instructions.
533 // FP data instructions.
548 // FP miscellaneous instructions.
562 // FP load instructions.
585 // FP store instructions.
[all …]
H A DAArch64SchedA57.td442 // ASIMD FP arith, normal, D-form
452 // ASIMD FP compare, D-form
454 // ASIMD FP compare, Q-form
464 // ASIMD FP divide, D-form, F32
466 // ASIMD FP divide, Q-form, F32
468 // ASIMD FP divide, Q-form, F64
487 // ASIMD FP max/min, reduce
490 // ASIMD FP multiply, D-form, FZ
492 // ASIMD FP multiply, Q-form, FZ
508 // ASIMD FP round, D-form
[all …]
H A DAArch64SchedExynosM5.td52 def M5PipeF0 : ProcResource<1>; // FP #0
579 // FP data instructions.
585 // FP miscellaneous instructions.
590 // FP load instructions.
593 // FP store instructions.
596 // ASIMD FP instructions.
697 // FP data instructions.
719 // FP miscellaneous instructions.
733 // FP load instructions.
756 // FP store instructions.
[all …]
H A DAArch64SchedExynosM4.td51 def M4PipeF0 : ProcResource<1>; // FP #0
543 // FP data instructions.
549 // FP miscellaneous instructions.
554 // FP load instructions.
557 // FP store instructions.
560 // ASIMD FP instructions.
630 // FP data instructions.
660 // FP miscellaneous instructions.
677 // FP load instructions.
706 // FP store instructions.
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiFrameLowering.cpp114 .addReg(Lanai::FP) in emitPrologue()
122 BuildMI(MBB, MBBI, DL, LII.get(Lanai::ADD_I_LO), Lanai::FP) in emitPrologue()
187 .addReg(Lanai::FP) in emitEpilogue()
191 BuildMI(MBB, MBBI, DL, LII.get(Lanai::LDW_RI), Lanai::FP) in emitEpilogue()
192 .addReg(Lanai::FP) in emitEpilogue()
/freebsd-13.1/contrib/llvm-project/clang/lib/AST/Interp/
H A DEvalEmitter.cpp123 const Pointer &FP = Ptr.atField(F.Offset); in emitRetValue() local
125 if (FP.isActive()) { in emitRetValue()
127 TYPE_SWITCH(*T, Ok &= ReturnValue<T>(FP.deref<T>(), Value)); in emitRetValue()
129 Ok &= Composite(FieldTy, FP, Value); in emitRetValue()
145 const Pointer &FP = Ptr.atField(FD->Offset); in emitRetValue() local
149 TYPE_SWITCH(*T, Ok &= ReturnValue<T>(FP.deref<T>(), Value)); in emitRetValue()
151 Ok &= Composite(FieldTy, FP, Value); in emitRetValue()
/freebsd-13.1/contrib/llvm-project/llvm/lib/IR/
H A DLegacyPassManager.cpp305 return FP; in getContainedManager()
1394 FP->dumpPassStructure(Offset + 1); in dumpPassStructure()
1395 dumpLastUses(FP, Offset+1); in dumpPassStructure()
1429 dumpRequiredSet(FP); in runOnFunction()
1431 initializeAnalysisImpl(FP); in runOnFunction()
1434 PassManagerPrettyStackEntry X(FP, F); in runOnFunction()
1468 dumpPreservedSet(FP); in runOnFunction()
1469 dumpUsedSet(FP); in runOnFunction()
1471 verifyPreservedAnalysis(FP); in runOnFunction()
1473 removeNotPreservedAnalysis(FP); in runOnFunction()
[all …]
/freebsd-13.1/crypto/openssl/crypto/poly1305/asm/
H A Dpoly1305-c64xplus.pl117 || [A2] STDW A13:A12,*FP[-3]
118 [A2] STDW A11:A10,*FP[-4]
252 LDDW *FP[-4],A11:A10 ; ABI says so
253 LDDW *FP[-3],A13:A12
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsRegisterInfo.cpp195 Reserved.set(Mips::FP); in getReservedRegs()
284 return TFI->hasFP(MF) ? (IsN64 ? Mips::FP_64 : Mips::FP) : in getFrameRegister()
300 unsigned FP = Subtarget.isGP32bit() ? Mips::FP : Mips::FP_64; in canRealignStack() local
309 if (!MF.getRegInfo().canReserveReg(FP)) in canRealignStack()
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DRegisterUsageInfo.h51 void storeUpdateRegUsageInfo(const Function &FP,
56 ArrayRef<uint32_t> getRegUsageInfo(const Function &FP);
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVSchedRocket.td34 def RocketUnitFPALU : ProcResource<1>; // FP ALU
39 def RocketUnitFPDivSqrt : ProcResource<1>; // FP Divide/Sqrt
145 // FP multiplication
156 // FP division
157 // FP division unit on Rocket is not pipelined, so set resource cycles to latency.
163 // FP square root unit on Rocket is not pipelined, so set resource cycles to latency.
/freebsd-13.1/share/syscons/fonts/
H A Diso02-8x14.fnt30 M``````#&QL;6UM;^[FP``````,;&;#@X.&S&Q@``````9F9F9CP8&!@\````
69 M`'S&QL;&QL9\````-FP`?,;&QL;&QGP`````Q@!\QL;&QL;&?```````````
71 MQL9\````-FP`QL;&QL;&QGP`````Q@#&QL;&QL;&?`````P8`&9F9F8\&!@\
79 M`'S&QL;&?```````-FP`?,;&QL9\``````#&``!\QL;&QGP`````````&!@`

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