| /freebsd-13.1/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | ConstrainedOps.def | 75 DAG_FUNCTION(exp2, 1, 1, experimental_constrained_exp2, FEXP2)
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| /freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 878 FEXP2, enumerator
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| H A D | BasicTTIImpl.h | 1575 ISDs.push_back(ISD::FEXP2); in getTypeBasedIntrinsicInstrCost()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 219 case ISD::FEXP2: return "fexp2"; in getOperationName()
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| H A D | LegalizeFloatTypes.cpp | 88 case ISD::FEXP2: R = SoftenFloatRes_FEXP2(N); break; in SoftenFloatResult()
1212 case ISD::FEXP2: ExpandFloatRes_FEXP2(N, Lo, Hi); break; in ExpandFloatResult()
2236 case ISD::FEXP2: in PromoteFloatResult()
2600 case ISD::FEXP2: in SoftPromoteHalfResult()
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| H A D | LegalizeVectorOps.cpp | 424 case ISD::FEXP2: in LegalizeOp()
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| H A D | LegalizeVectorTypes.cpp | 85 case ISD::FEXP2: in ScalarizeVectorResult()
979 case ISD::FEXP2: in SplitVectorResult()
3114 case ISD::FEXP2: in WidenVectorResult()
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| H A D | LegalizeDAG.cpp | 3984 case ISD::FEXP2: in ConvertNodeToLibcall()
4732 case ISD::FEXP2: in PromoteNode()
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| H A D | SelectionDAGBuilder.cpp | 5313 return DAG.getNode(ISD::FEXP2, dl, Op.getValueType(), Op, Flags); in expandExp2()
8044 if (visitUnaryFloatCall(I, ISD::FEXP2)) in visitCall()
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| H A D | SelectionDAG.cpp | 4349 case ISD::FEXP2: in isKnownNeverNaN()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 153 setOperationAction(ISD::FEXP2, MVT::f16, Promote); in MipsSETargetLowering()
390 setOperationAction(ISD::FEXP2, Ty, Legal); in addMSAFloatType()
1895 DAG.getNode(ISD::FEXP2, SDLoc(Op), ResTy, Op->getOperand(2))); in lowerINTRINSIC_WO_CHAIN()
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| H A D | MipsMSAInstrInfo.td | 2047 // 1.0 when we only need to match ISD::FEXP2.
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 893 setOperationAction(ISD::FEXP2, VT, Expand); in initActions()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 325 setOperationAction(ISD::FEXP2, MVT::f32, Legal); in AMDGPUTargetLowering()
509 setOperationAction(ISD::FEXP2, VT, Expand); in AMDGPUTargetLowering()
2369 return DAG.getNode(ISD::FEXP2, SL, VT, Mul, Op->getFlags()); in lowerFEXP()
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| H A D | AMDGPUISelDAGToDAG.cpp | 432 case ISD::FEXP2: in fp16SrcZerosHighBits()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 231 ISD::FEXP, ISD::FEXP2, ISD::FRINT}) in WebAssemblyTargetLowering()
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| /freebsd-13.1/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 482 def fexp2 : SDNode<"ISD::FEXP2" , SDTFPUnaryOp>;
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 364 setOperationAction(ISD::FEXP2, VT, Expand); in addMVEVectorTypes()
846 setOperationAction(ISD::FEXP2, MVT::v2f64, Expand); in ARMTargetLowering()
867 setOperationAction(ISD::FEXP2, MVT::v4f32, Expand); in ARMTargetLowering()
883 setOperationAction(ISD::FEXP2, MVT::v2f32, Expand); in ARMTargetLowering()
1031 setOperationAction(ISD::FEXP2, MVT::f64, Expand); in ARMTargetLowering()
1481 setOperationAction(ISD::FEXP2, MVT::f16, Promote); in ARMTargetLowering()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 362 setOperationAction(ISD::FEXP2, VT, Expand); in AArch64TargetLowering()
601 setOperationAction(ISD::FEXP2, MVT::f16, Promote); in AArch64TargetLowering()
602 setOperationAction(ISD::FEXP2, MVT::v4f16, Expand); in AArch64TargetLowering()
603 setOperationAction(ISD::FEXP2, MVT::v8f16, Expand); in AArch64TargetLowering()
1418 setOperationAction(ISD::FEXP2, VT, Expand); in addTypeForNEON()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1643 ISD::FLOG10, ISD::FEXP, ISD::FEXP2, ISD::FCEIL, ISD::FTRUNC, in HexagonTargetLowering()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 806 setOperationAction(ISD::FEXP2, VT, Expand); in PPCTargetLowering()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 797 setOperationAction(ISD::FEXP2, MVT::f80, Expand); in X86TargetLowering()
814 setOperationAction(ISD::FEXP2, VT, Expand); in X86TargetLowering()
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