Searched refs:ExtendOpc (Results 1 – 3 of 3) sorted by relevance
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.h | 577 unsigned ExtendOpc) const;
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| H A D | RISCVISelLowering.cpp | 3262 SDValue Op, SelectionDAG &DAG, unsigned ExtendOpc) const { in lowerFixedLengthVectorExtendToRVV()
3284 SDValue Ext = DAG.getNode(ExtendOpc, DL, ContainerExtVT, Op1, Mask, VL); in lowerFixedLengthVectorExtendToRVV()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 3029 unsigned ExtendOpc = IsSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in getAArch64XALUOOp() local
3030 LHS = DAG.getNode(ExtendOpc, DL, MVT::i64, LHS); in getAArch64XALUOOp()
3031 RHS = DAG.getNode(ExtendOpc, DL, MVT::i64, RHS); in getAArch64XALUOOp()
18121 unsigned ExtendOpc = Signed ? AArch64ISD::SUNPKLO : AArch64ISD::UUNPKLO; in LowerFixedLengthVectorIntExtendToSVE() local
18128 Val = DAG.getNode(ExtendOpc, DL, MVT::nxv8i16, Val); in LowerFixedLengthVectorIntExtendToSVE()
18133 Val = DAG.getNode(ExtendOpc, DL, MVT::nxv4i32, Val); in LowerFixedLengthVectorIntExtendToSVE()
18138 Val = DAG.getNode(ExtendOpc, DL, MVT::nxv2i64, Val); in LowerFixedLengthVectorIntExtendToSVE()
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