Searched refs:ExtR (Results 1 – 3 of 3) sorted by relevance
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonConstExtenders.cpp | 1619 .add(MachineOperand(ExtR)) in replaceInstrExact() 1624 .add(MachineOperand(ExtR)) in replaceInstrExact() 1638 .add(MachineOperand(ExtR)) in replaceInstrExact() 1652 MIB.add(MachineOperand(ExtR)); in replaceInstrExact() 1719 Register ExtR, int32_t &Diff) { in replaceInstrExpr() argument 1751 .add(MachineOperand(ExtR)) in replaceInstrExpr() 1784 .add(MachineOperand(ExtR)); in replaceInstrExpr() 1809 .add(MachineOperand(ExtR)); in replaceInstrExpr() 1826 MIB.add(MachineOperand(ExtR)); in replaceInstrExpr() 1885 Replaced = replaceInstrExact(ED, ExtR); in replaceInstr() [all …]
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| H A D | HexagonVExtract.cpp | 174 Register ExtR = ExtI->getOperand(0).getReg(); in runOnMachineFunction() local 175 MRI.replaceRegWith(ExtR, ElemR); in runOnMachineFunction()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 21190 SDValue ExtR = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT, R, Index); in visitVECTOR_SHUFFLE() local 21191 SDValue NewBO = DAG.getNode(N0.getOpcode(), DL, EltVT, ExtL, ExtR, in visitVECTOR_SHUFFLE()
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