Searched refs:Ext2 (Results 1 – 8 of 8) sorted by relevance
| /freebsd-13.1/contrib/llvm-project/llvm/include/llvm/BinaryFormat/ |
| H A D | MsgPack.def | 95 HANDLE_MP_FIX_LEN(0x02, Ext2)
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/BinaryFormat/ |
| H A D | MsgPackWriter.cpp | 180 case FixLen::Ext2: in writeExt()
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| H A D | MsgPackReader.cpp | 124 return createExt(Obj, FixLen::Ext2); in read()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 11504 static bool areExtractExts(Value *Ext1, Value *Ext2) { in areExtractExts() argument
11511 !match(Ext2, m_ZExtOrSExt(m_Value())) || in areExtractExts()
11513 !areExtDoubled(cast<Instruction>(Ext2))) in areExtractExts()
11574 auto Ext2 = cast<Instruction>(I->getOperand(1)); in shouldSinkOperands() local
11575 if (areExtractShuffleVectors(Ext1, Ext2)) { in shouldSinkOperands()
11577 Ops.push_back(&Ext2->getOperandUse(0)); in shouldSinkOperands()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 9968 SDValue Ext2 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0, in LowerVecReduce() local
9973 SDValue Res1 = DAG.getNode(BaseOpcode, dl, EltVT, Ext2, Ext3, Op->getFlags()); in LowerVecReduce()
18014 static bool areExtractExts(Value *Ext1, Value *Ext2) { in areExtractExts() argument
18021 !match(Ext2, m_ZExtOrSExt(m_Value())) || in areExtractExts()
18023 !areExtDoubled(cast<Instruction>(Ext2))) in areExtractExts()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 14065 SDValue Ext2 = N->getOperand(1).getOperand(0); in DAGCombineBuildVector() local
14067 Ext2.getOpcode() != ISD::EXTRACT_VECTOR_ELT) in DAGCombineBuildVector()
14071 ConstantSDNode *Ext2Op = dyn_cast<ConstantSDNode>(Ext2.getOperand(1)); in DAGCombineBuildVector()
14075 Ext1.getOperand(0) != Ext2.getOperand(0)) in DAGCombineBuildVector()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 10381 SDValue Ext2 = DAG.getNode(Opcode, DL, VT, Op2); in tryToFoldExtendSelectLoad() local
10382 return DAG.getSelect(DL, VT, N0->getOperand(0), Ext1, Ext2); in tryToFoldExtendSelectLoad()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 41049 SDValue Ext2 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, in scalarizeExtEltFP() local
41051 return DAG.getNode(ISD::SELECT, DL, VT, Ext0, Ext1, Ext2); in scalarizeExtEltFP()
50742 SDValue Ext2 = extractSubVector(InVec.getOperand(2), 0, DAG, DL, 128); in combineExtractSubvector() local
50743 return DAG.getNode(InOpcode, DL, VT, Ext0, Ext1, Ext2); in combineExtractSubvector()
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