| /freebsd-13.1/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | VectorCombine.cpp | 265 return Ext0; in getShuffleExtract()
274 return Ext0; in getShuffleExtract()
277 return Index0 > Index1 ? Ext0 : Ext1; in getShuffleExtract()
293 Type *ScalarTy = Ext0->getType(); in isExtractExtractCheap()
338 bool HasUseTax = Ext0 == Ext1 ? !Ext0->hasNUses(2) in isExtractExtractCheap()
475 auto *Ext0 = cast<ExtractElementInst>(I0); in foldExtractExtract() local
493 if (ExtractToChange == Ext0) in foldExtractExtract()
494 Ext0 = NewExtract; in foldExtractExtract()
500 foldExtExtCmp(Ext0, Ext1, I); in foldExtractExtract()
502 foldExtExtBinop(Ext0, Ext1, I); in foldExtractExtract()
[all …]
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 9964 SDValue Ext0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0, in LowerVecReduce() local
9976 SDValue Ext0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0, in LowerVecReduce() local
9980 Res = DAG.getNode(BaseOpcode, dl, EltVT, Ext0, Ext1, Op->getFlags()); in LowerVecReduce()
12919 SDValue Ext0 = Mul.getOperand(0); in PerformVQDMULHCombine() local
12921 if (Ext0.getOpcode() != ISD::SIGN_EXTEND || in PerformVQDMULHCombine()
12924 EVT VecVT = Ext0.getOperand(0).getValueType(); in PerformVQDMULHCombine()
12942 DAG.getNode(ISD::ANY_EXTEND, DL, ExtVecVT, Ext0.getOperand(0)); in PerformVQDMULHCombine()
12959 DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, LegalVecVT, Ext0.getOperand(0), in PerformVQDMULHCombine()
16107 SDValue Ext0 = in PerformVECREDUCE_ADDCombine() local
16115 Ext0, Ext1); in PerformVECREDUCE_ADDCombine()
[all …]
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 2646 auto Ext0 = B.buildFPExt(S32, Log, Flags); in legalizeFPow() local
2649 .addUse(Ext0.getReg(0)) in legalizeFPow()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 10997 SDValue Ext0 = DAG.getNode(ExtOpcode, DL, VT, N00); in foldSextSetcc() local
10999 return DAG.getSetCC(DL, VT, Ext0, Ext1, CC); in foldSextSetcc()
18694 SDValue Ext0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, Op0, Index); in scalarizeExtractedBinop() local
18696 return DAG.getNode(Vec.getOpcode(), DL, VT, Ext0, Ext1); in scalarizeExtractedBinop()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 39050 SDValue Ext0 = in SimplifyDemandedVectorEltsForTargetNode() local
39053 TLO.DAG.getNode(Opc, DL, Ext0.getValueType(), Ext0, Op.getOperand(1)); in SimplifyDemandedVectorEltsForTargetNode()
41022 SDValue Ext0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, OpVT, in scalarizeExtEltFP() local
41026 return DAG.getNode(Vec.getOpcode(), DL, VT, Ext0, Ext1, Vec.getOperand(2)); in scalarizeExtEltFP()
41044 SDValue Ext0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, in scalarizeExtEltFP() local
41051 return DAG.getNode(ISD::SELECT, DL, VT, Ext0, Ext1, Ext2); in scalarizeExtEltFP()
50740 SDValue Ext0 = extractSubVector(InVec.getOperand(0), 0, DAG, DL, 128); in combineExtractSubvector() local
50743 return DAG.getNode(InOpcode, DL, VT, Ext0, Ext1, Ext2); in combineExtractSubvector()
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