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Searched refs:ElementWidth (Results 1 – 5 of 5) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/
H A DAArch64AsmParser.cpp360 int ElementWidth; member
385 unsigned ElementWidth; member
397 unsigned ElementWidth; member
1194 if (isSVEVectorReg<Class>() && (Reg.ElementWidth == ElementWidth)) in isSVEPredicateVectorRegOfWidth()
1205 if (isSVEVectorReg<Class>() && Reg.ElementWidth == ElementWidth) in isSVEDataVectorRegOfWidth()
1309 if (VectorList.ElementWidth != ElementWidth) in isTypedVectorList()
2011 Op->Reg.ElementWidth = ElementWidth; in CreateVectorReg()
2023 Op->VectorList.ElementWidth = ElementWidth; in CreateVectorList()
2068 if (ElementWidth == 64) in ComputeRegsForAlias()
2202 Op->MatrixReg.ElementWidth = ElementWidth; in CreateMatrixRegister()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/Disassembler/
H A DAArch64Disassembler.cpp235 template <int ElementWidth>
2015 template <int ElementWidth>
2020 if (ElementWidth == 8 && Shift) in DecodeImm8OptLsl()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64RegisterInfo.td1013 class ZPRVectorList<int ElementWidth, int NumRegs> : AsmOperandClass {
1014 let Name = "SVEVectorList" # NumRegs # ElementWidth;
1017 "isTypedVectorList<RegKind::SVEDataVector, " #NumRegs #", 0, " #ElementWidth #">";
H A DSVEInstrFormats.td158 class SVEShiftedImmOperand<int ElementWidth, string Infix, string Predicate>
160 let Name = "SVE" # Infix # "Imm" # ElementWidth;
177 class imm8_opt_lsl<int ElementWidth, string printType,
181 let DecoderMethod = "DecodeImm8OptLsl<" # ElementWidth # ">";
/freebsd-13.1/contrib/llvm-project/clang/lib/AST/
H A DExprConstant.cpp7112 CharUnits ElementWidth = Info.Ctx.getTypeSizeInChars(Ty->getElementType()); in visit() local
7117 visitType(Ty->getElementType(), Offset + I * ElementWidth); in visit()