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Searched refs:ESP (Results 1 – 25 of 45) sorted by relevance

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/freebsd-13.1/sbin/setkey/
H A Dsample.cf33 # security protocol (AH or ESP) identifier. You must take care of these
36 # ESP transport mode is recommended for TCP port number 110 between
41 # ============ ESP ============
101 # AH transport mode followed by ESP tunnel mode is required between
107 # | ======= ESP ===== |
134 # ESP tunnel mode is required between Host-A and Gateway-A.
136 # for ESP is hmac-sha2-256.
137 # ESP transport mode is recommended between Host-A and Host-B.
139 # for ESP is hmac-sha2-512.
141 # ================== ESP =================
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/freebsd-13.1/release/tools/
H A Dvmimage.subr203 ESP=yes
210 ESP=yes
216 ESP=no
231 if [ ${ESP} = "yes" ]; then
254 if [ ${ESP} = "yes" ]; then
/freebsd-13.1/sys/cddl/dev/dtrace/x86/
H A Dregset.h137 #define ESP 7 macro
158 #define ESP 6
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/
H A DDwarfCFIException.cpp134 ExceptionSymbolProvider ESP) { in beginFragment() argument
172 Asm->OutStreamer->emitCFILsda(ESP(Asm, MBB), TLOF.getLSDAEncoding()); in beginFragment()
H A DDwarfException.h65 ExceptionSymbolProvider ESP) override;
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/Support/Solaris/sys/
H A Dregset.h28 #undef ESP
/freebsd-13.1/tools/kerneldoc/subsys/
H A DDoxyfile-dev_esp8 PROJECT_NAME = "FreeBSD kernel ESP device code"
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
H A DX86MCTargetDesc.cpp107 {codeview::RegisterId::ESP, X86::ESP}, in initLLVMToSEHAndCVRegMapping()
352 unsigned StackPtr = is64Bit ? X86::RSP : X86::ESP; in createX86MCAsmInfo()
625 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP: in getX86SubSuperRegisterOrZero()
653 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP: in getX86SubSuperRegisterOrZero()
690 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP: in getX86SubSuperRegisterOrZero()
726 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP: in getX86SubSuperRegisterOrZero()
727 return X86::ESP; in getX86SubSuperRegisterOrZero()
762 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP: in getX86SubSuperRegisterOrZero()
H A DX86MCTargetDesc.h51 EAX = 0, ECX = 1, EDX = 2, EBX = 3, ESP = 4, EBP = 5, ESI = 6, EDI = 7 enumerator
/freebsd-13.1/sys/i386/i386/
H A Dbpf_jit_machdep.c209 MOVrd(ESP, EBP); in bpf_jit_compile()
212 SUBib(BPF_MEMWORDS * sizeof(uint32_t), ESP); in bpf_jit_compile()
311 MOVrd(ESP, ECX); in bpf_jit_compile()
320 MOVrd(ESP, ECX); in bpf_jit_compile()
H A Dbpf_jit_machdep.h46 #define ESP 4 macro
/freebsd-13.1/share/examples/IPv6/
H A DUSAGE398 From HOST B to HOST A, new AH and new ESP are combined.
401 AH"/"ESP"/"new ESP". Please refer to the "setkey" man page to know
403 and new-DES-expIV with 8 byte IV for new ESP.
437 PROTO=ESP
438 ALG=new-DES-expIV(new ESP)
470 the "ping" command has the -P option with parameter to enable AH and/or ESP.
478 to be AH transport mode inner ESP tunnel mode like below.
483 | ======= ESP ======= |
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DAsmPrinterHandler.h61 ExceptionSymbolProvider ESP) {} in beginFragment() argument
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86RegisterInfo.td150 def ESP : X86Reg<"esp", 4, [SP, HSP]>, DwarfRegNum<[-2, 5, 4]>;
176 def RSP : X86Reg<"rsp", 4, [ESP]>, DwarfRegNum<[7, -2, -2]>;
427 (add EAX, ECX, EDX, ESI, EDI, EBX, EBP, ESP,
461 def GR32_TC : RegisterClass<"X86", [i32], 32, (add EAX, ECX, EDX, ESP)>;
481 (add EAX, ECX, EDX, ESI, EDI, EBX, EBP, ESP)>;
486 // GR32_NOSP - GR32 registers except ESP.
487 def GR32_NOSP : RegisterClass<"X86", [i32], 32, (sub GR32, ESP)>;
493 // ESP.
533 def GR32_BPSP : RegisterClass<"X86", [i32], 32, (add EBP, ESP)>;
H A DX86InstrControl.td219 // All calls clobber the non-callee saved registers. ESP is marked as
223 let Uses = [ESP, SSP] in {
291 isCodeGenOnly = 1, Uses = [ESP, SSP] in {
314 let Uses = [ESP, EFLAGS, SSP] in {
H A DX86RegisterInfo.cpp66 StackPtr = Use64BitReg ? X86::RSP : X86::ESP; in X86RegisterInfo()
71 StackPtr = X86::ESP; in X86RegisterInfo()
844 if (!Uses.count(CS) && CS != X86::RIP && CS != X86::RSP && CS != X86::ESP) in findDeadCallerSavedReg()
H A DX86IndirectThunks.cpp245 const Register SPReg = Is64Bit ? X86::RSP : X86::ESP; in populateThunk()
H A DX86FixupLEAs.cpp580 if (UseLEAForSP && (DestReg == X86::ESP || DestReg == X86::RSP)) in optTwoAddrLEA()
668 if (p.isReg() && p.getReg() != X86::ESP) { in processInstruction()
672 if (q.isReg() && q.getReg() != X86::ESP) { in processInstruction()
H A DX86FrameLowering.cpp1011 unsigned SP = Uses64BitFramePtr ? X86::RSP : X86::ESP; in emitStackProbeCall()
1780 .addReg(X86::ESP); in emitPrologue()
2067 TRI->getDwarfRegNum(Is64Bit ? X86::RSP : X86::ESP, true); in emitEpilogue()
2835 ScratchReg = IsLP64 ? X86::RSP : X86::ESP; in adjustForSegmentedStacks()
2862 ScratchReg = X86::ESP; in adjustForSegmentedStacks()
2864 BuildMI(checkMBB, DL, TII.get(X86::LEA32r), ScratchReg).addReg(X86::ESP) in adjustForSegmentedStacks()
3137 SPReg = X86::ESP; in adjustForHiPEPrologue()
3434 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32rm), X86::ESP), in restoreWin32EHStackPointers()
/freebsd-13.1/stand/i386/btx/btx/
H A Dbtx.S61 .set TSS_ESP0,0x4 # PL 0 ESP
216 pushl %eax # Set ESP
364 except.2: pushl 0x50(%esp,1) # Set ESP
499 addl -0x4(%esi),%ebx # User ESP
/freebsd-13.1/cddl/contrib/opensolaris/lib/libdtrace/i386/
H A Dregs.sed.in51 SED_REPLACE(ESP)
H A Dregs.d.in44 inline int R_ESP = @ESP@;
/freebsd-13.1/share/doc/IPv6/
H A DIMPLEMENTATION73 4.3 AH and ESP handling
1784 (3) AH, ESP and IPComp handling in kernel
1817 IP AH ESP IP payload
1820 implementation proposes it as "AH tunnel and ESP tunnel".
1828 4.3 AH and ESP handling
1833 Policy Database) is found. If ESP/AH is needed,
1839 safe to strip off the ESP/AH header on packet reception, since we
1909 alone, without AH/ESP.
1944 old IPsec ESP
1958 new IPsec ESP
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/freebsd-13.1/sys/amd64/amd64/
H A Dbpf_jit_machdep.h63 #define ESP 4 macro
/freebsd-13.1/contrib/libpcap/
H A Dgrammar.y334 %token IPV6 ICMPV6 AH ESP
528 | ESP { $$ = Q_ESP; }

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