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/freebsd-13.1/sys/contrib/device-tree/Bindings/edac/
H A Dsocfpga-eccmgr.txt1 Altera SoCFPGA ECC Manager
15 L2 Cache ECC
22 On Chip RAM ECC
71 L2 Cache ECC
93 NAND FIFO ECC
101 DMA FIFO ECC
109 USB FIFO ECC
117 QSPI FIFO ECC
256 SDRAM ECC
282 DMA FIFO ECC
[all …]
H A Daspeed-sdram-edac.txt3 The Aspeed AST2500 SoC supports DDR3 and DDR4 memory with and without ECC (error
10 Note, the bootloader must configure ECC mode in the memory controller.
/freebsd-13.1/sys/contrib/device-tree/Bindings/memory-controllers/
H A Dsynopsys.txt3 The ZynqMP DDR ECC controller has an optional ECC support in 64-bit and 32-bit
6 The Zynq DDR ECC controller has an optional ECC support in half-bus width
9 These both ECC controllers correct single bit ECC errors and detect double bit
10 ECC errors.
14 - 'xlnx,zynq-ddrc-a05' : Zynq DDR ECC controller
15 - 'xlnx,zynqmp-ddrc-2.40a' : ZynqMP DDR ECC controller
/freebsd-13.1/sys/contrib/device-tree/Bindings/mtd/
H A Dgpmc-nand.txt27 - ti,nand-ecc-opt: A string setting the ECC layout to use. One of:
34 "bch16" 16-bit BCH ECC code
35 Refer below "How to select correct ECC scheme for your device ?"
47 locating ECC errors for BCHx algorithms. SoC devices which have
49 Using ELM for ECC error correction frees some CPU cycles.
105 How to select correct ECC scheme for your device ?
121 Higher ECC schemes require more OOB/Spare area to store ECC syndrome,
124 helps in determining if given device can accommodate ECC syndrome:
129 ECC_BYTES number of ECC bytes generated to protect
138 Number of ECC bytes per page = (2 + (2048 / 512) * 26) = 106 B
[all …]
H A Dnand-controller.yaml19 The ECC strength and ECC step size properties define the user
21 they request the ECC engine to correct {strength} bit errors per
51 Desired ECC engine, either hardware (most of the time
60 Desired ECC algorithm.
84 Maximum number of bits that can be corrected per ECC step.
90 Number of data bytes covered by a single ECC step.
97 Whether or not the ECC strength should be maximized. The
98 maximum ECC strength is both controller and chip
99 dependent. The ECC engine has to select the ECC config
109 use this information to select ECC algorithms supported by
H A Dmtk-nand.txt5 the nand controller interface driver and the ECC engine driver.
23 - ecc-engine: Required ECC Engine node.
50 - nand-ecc-step-size: Number of data bytes covered by a single ECC step.
55 - nand-ecc-strength: Number of bits to correct per ECC step.
155 2) ECC Engine:
163 - reg: Base physical address and size of ECC.
164 - interrupts: Interrupts of ECC.
165 - clocks: ECC required clocks.
166 - clock-names: ECC clocks internal name.
H A Dnvidia-tegra20-nand.txt27 - nand-ecc-algo: string, algorithm of NAND ECC.
28 Supported values with "hw" ECC mode are: "rs", "bch".
32 per ECC step (always 512). Supported strength using HW ECC
37 - nand-is-boot-medium: Makes sure only ECC strengths supported by the boot ROM
H A Dgpmi-nand.txt32 - fsl,use-minimum-ecc: Protect this NAND flash with the minimum ECC
33 strength required. The required ECC strength is
39 ECC scheme.
51 per ECC step. Needs to be a multiple of 2.
53 that are covered by a single ECC step. The driver
H A Dhisi504-nand.txt17 - nand-ecc-strength: Number of bits to correct per ECC step.
18 - nand-ecc-step-size: Number of data bytes covered by a single ECC step.
20 The following ECC strength and step size are currently supported:
H A Dmarvell-nand.txt47 - nand-ecc-mode: see nand-controller.yaml. Will use hardware ECC if not specified.
49 not using hardware ECC. Howerver, it may be added when using hardware
50 ECC for clarification but will be ignored by the driver because ECC
59 patterns described in AN-379, "Marvell SoC NFC ECC".
/freebsd-13.1/sys/contrib/device-tree/Bindings/reserved-memory/
H A Dramoops.txt10 as kernel log messages, or for optional ECC error-correction data. The total
30 - ecc-size: enables ECC support and specifies ECC buffer size in bytes
31 (defaults to 0: no ECC)
/freebsd-13.1/secure/caroot/trusted/
H A DGlobalSign_ECC_Root_CA_-_R4.pem2 ## GlobalSign ECC Root CA - R4
21 Issuer: OU = GlobalSign ECC Root CA - R4, O = GlobalSign, CN = GlobalSign
25 Subject: OU = GlobalSign ECC Root CA - R4, O = GlobalSign, CN = GlobalSign
H A DHellenic_Academic_and_Research_Institutions_ECC_RootCA_2015.pem2 ## Hellenic Academic and Research Institutions ECC RootCA 2015
20 …arch Institutions Cert. Authority, CN = Hellenic Academic and Research Institutions ECC RootCA 2015
24 …arch Institutions Cert. Authority, CN = Hellenic Academic and Research Institutions ECC RootCA 2015
H A DTrustwave_Global_ECC_P256_Certification_Authority.pem2 ## Trustwave Global ECC P256 Certification Authority
21 …linois, L = Chicago, O = "Trustwave Holdings, Inc.", CN = Trustwave Global ECC P256 Certification …
25 …linois, L = Chicago, O = "Trustwave Holdings, Inc.", CN = Trustwave Global ECC P256 Certification …
H A DAffirmTrust_Premium_ECC.pem2 ## AffirmTrust Premium ECC
20 Issuer: C = US, O = AffirmTrust, CN = AffirmTrust Premium ECC
24 Subject: C = US, O = AffirmTrust, CN = AffirmTrust Premium ECC
H A DGlobalSign_ECC_Root_CA_-_R5.pem2 ## GlobalSign ECC Root CA - R5
21 Issuer: OU = GlobalSign ECC Root CA - R5, O = GlobalSign, CN = GlobalSign
25 Subject: OU = GlobalSign ECC Root CA - R5, O = GlobalSign, CN = GlobalSign
H A DMicrosoft_ECC_Root_Certificate_Authority_2017.pem2 ## Microsoft ECC Root Certificate Authority 2017
21 … Issuer: C = US, O = Microsoft Corporation, CN = Microsoft ECC Root Certificate Authority 2017
25 … Subject: C = US, O = Microsoft Corporation, CN = Microsoft ECC Root Certificate Authority 2017
H A DSSL_com_Root_Certification_Authority_ECC.pem2 ## SSL.com Root Certification Authority ECC
20 …C = US, ST = Texas, L = Houston, O = SSL Corporation, CN = SSL.com Root Certification Authority ECC
24 …C = US, ST = Texas, L = Houston, O = SSL Corporation, CN = SSL.com Root Certification Authority ECC
H A DemSign_ECC_Root_CA_-_G3.pem2 ## emSign ECC Root CA - G3
21 … Issuer: C = IN, OU = emSign PKI, O = eMudhra Technologies Limited, CN = emSign ECC Root CA - G3
25 … Subject: C = IN, OU = emSign PKI, O = eMudhra Technologies Limited, CN = emSign ECC Root CA - G3
H A DTrustwave_Global_ECC_P384_Certification_Authority.pem2 ## Trustwave Global ECC P384 Certification Authority
21 …linois, L = Chicago, O = "Trustwave Holdings, Inc.", CN = Trustwave Global ECC P384 Certification …
25 …linois, L = Chicago, O = "Trustwave Holdings, Inc.", CN = Trustwave Global ECC P384 Certification …
H A DemSign_ECC_Root_CA_-_C3.pem2 ## emSign ECC Root CA - C3
21 Issuer: C = US, OU = emSign PKI, O = eMudhra Inc, CN = emSign ECC Root CA - C3
25 Subject: C = US, OU = emSign PKI, O = eMudhra Inc, CN = emSign ECC Root CA - C3
H A DUSERTrust_ECC_Certification_Authority.pem2 ## USERTrust ECC Certification Authority
21 …T = New Jersey, L = Jersey City, O = The USERTRUST Network, CN = USERTrust ECC Certification Autho…
25 …T = New Jersey, L = Jersey City, O = The USERTRUST Network, CN = USERTrust ECC Certification Autho…
H A DCOMODO_ECC_Certification_Authority.pem2 ## COMODO ECC Certification Authority
21 …, ST = Greater Manchester, L = Salford, O = COMODO CA Limited, CN = COMODO ECC Certification Autho…
25 …, ST = Greater Manchester, L = Salford, O = COMODO CA Limited, CN = COMODO ECC Certification Autho…
/freebsd-13.1/sys/contrib/device-tree/Bindings/arm/calxeda/
H A Dl2ecc.yaml7 title: Calxeda Highbank L2 cache ECC
10 Binding for the Calxeda Highbank L2 cache controller ECC device.
/freebsd-13.1/crypto/openssl/doc/man3/
H A DSSL_CTX_set_security_level.pod77 DSA and DH keys shorter than 1024 bits and ECC keys shorter than 160 bits
85 shorter than 2048 bits and ECC keys shorter than 224 bits are prohibited.
92 shorter than 3072 bits and ECC keys shorter than 256 bits are prohibited.
100 DH keys shorter than 7680 bits and ECC keys shorter than 384 bits are
107 shorter than 15360 bits and ECC keys shorter than 512 bits are prohibited.
130 cipher suite encryption algorithms, supported ECC curves, supported
139 Some security levels require large key sizes for non-ECC public key

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