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Searched refs:DwarfRegNum (Results 1 – 24 of 24) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonRegisterInfo.td104 def R#i : Ri<i, "r"#i>, DwarfRegNum<[i]>;
106 def R29 : Ri<29, "r29", ["sp"]>, DwarfRegNum<[29]>;
131 def P0 : Rp<0, "p0">, DwarfRegNum<[63]>;
132 def P1 : Rp<1, "p1">, DwarfRegNum<[64]>;
133 def P2 : Rp<2, "p2">, DwarfRegNum<[65]>;
134 def P3 : Rp<3, "p3">, DwarfRegNum<[66]>;
203 def VTMP : Ri<0, "vtmp">, DwarfRegNum<[131]>;
258 def Q0 : Rq<0, "q0">, DwarfRegNum<[131]>;
259 def Q1 : Rq<1, "q1">, DwarfRegNum<[132]>;
260 def Q2 : Rq<2, "q2">, DwarfRegNum<[133]>;
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYRegisterInfo.td52 def R0 : CSKYReg<0, "r0", ["a0"]>, DwarfRegNum<[0]>;
53 def R1 : CSKYReg<1, "r1", ["a1"]>, DwarfRegNum<[1]>;
54 def R2 : CSKYReg<2, "r2", ["a2"]>, DwarfRegNum<[2]>;
55 def R3 : CSKYReg<3, "r3", ["a3"]>, DwarfRegNum<[3]>;
56 def R4 : CSKYReg<4, "r4", ["l0"]>, DwarfRegNum<[4]>;
57 def R5 : CSKYReg<5, "r5", ["l1"]>, DwarfRegNum<[5]>;
58 def R6 : CSKYReg<6, "r6", ["l2"]>, DwarfRegNum<[6]>;
59 def R7 : CSKYReg<7, "r7", ["l3"]>, DwarfRegNum<[7]>;
60 def R8 : CSKYReg<8, "r8", ["l4"]>, DwarfRegNum<[8]>;
61 def R9 : CSKYReg<9, "r9", ["l5"]>, DwarfRegNum<[9]>;
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCRegisterInfo.td28 def R0 : Core< 0, "%r0">, DwarfRegNum<[0]>;
29 def R1 : Core< 1, "%r1">, DwarfRegNum<[1]>;
30 def R2 : Core< 2, "%r2">, DwarfRegNum<[2]>;
31 def R3 : Core< 3, "%r3">, DwarfRegNum<[3]>;
33 def R4 : Core< 4, "%r4">, DwarfRegNum<[4]>;
34 def R5 : Core< 5, "%r5">, DwarfRegNum<[5]>;
35 def R6 : Core< 6, "%r6">, DwarfRegNum<[6]>;
36 def R7 : Core< 7, "%r7">, DwarfRegNum<[7]>;
37 def R8 : Core< 8, "%r8">, DwarfRegNum<[8]>;
38 def R9 : Core< 9, "%r9">, DwarfRegNum<[9]>;
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRRegisterInfo.td44 def R0 : AVRReg<0, "r0">, DwarfRegNum<[0]>;
45 def R1 : AVRReg<1, "r1">, DwarfRegNum<[1]>;
46 def R2 : AVRReg<2, "r2">, DwarfRegNum<[2]>;
47 def R3 : AVRReg<3, "r3">, DwarfRegNum<[3]>;
48 def R4 : AVRReg<4, "r4">, DwarfRegNum<[4]>;
49 def R5 : AVRReg<5, "r5">, DwarfRegNum<[5]>;
50 def R6 : AVRReg<6, "r6">, DwarfRegNum<[6]>;
51 def R7 : AVRReg<7, "r7">, DwarfRegNum<[7]>;
52 def R8 : AVRReg<8, "r8">, DwarfRegNum<[8]>;
53 def R9 : AVRReg<9, "r9">, DwarfRegNum<[9]>;
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcRegisterInfo.td129 def G0 : Ri< 0, "G0">, DwarfRegNum<[0]>;
130 def G1 : Ri< 1, "G1">, DwarfRegNum<[1]>;
131 def G2 : Ri< 2, "G2">, DwarfRegNum<[2]>;
132 def G3 : Ri< 3, "G3">, DwarfRegNum<[3]>;
133 def G4 : Ri< 4, "G4">, DwarfRegNum<[4]>;
134 def G5 : Ri< 5, "G5">, DwarfRegNum<[5]>;
135 def G6 : Ri< 6, "G6">, DwarfRegNum<[6]>;
136 def G7 : Ri< 7, "G7">, DwarfRegNum<[7]>;
137 def O0 : Ri< 8, "O0">, DwarfRegNum<[8]>;
138 def O1 : Ri< 9, "O1">, DwarfRegNum<[9]>;
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreRegisterInfo.td25 def R0 : Ri< 0, "r0">, DwarfRegNum<[0]>;
26 def R1 : Ri< 1, "r1">, DwarfRegNum<[1]>;
27 def R2 : Ri< 2, "r2">, DwarfRegNum<[2]>;
28 def R3 : Ri< 3, "r3">, DwarfRegNum<[3]>;
29 def R4 : Ri< 4, "r4">, DwarfRegNum<[4]>;
30 def R5 : Ri< 5, "r5">, DwarfRegNum<[5]>;
31 def R6 : Ri< 6, "r6">, DwarfRegNum<[6]>;
32 def R7 : Ri< 7, "r7">, DwarfRegNum<[7]>;
33 def R8 : Ri< 8, "r8">, DwarfRegNum<[8]>;
34 def R9 : Ri< 9, "r9">, DwarfRegNum<[9]>;
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsRegisterInfo.td87 def ZERO : MipsGPRReg< 0, "zero">, DwarfRegNum<[0]>;
172 DwarfRegNum<[!add(I, 32)]>;
178 DwarfRegNum<[!add(I, 32)]>;
181 def HI0 : MipsReg<0, "ac0">, DwarfRegNum<[64]>;
182 def HI1 : MipsReg<1, "ac1">, DwarfRegNum<[176]>;
183 def HI2 : MipsReg<2, "ac2">, DwarfRegNum<[178]>;
184 def HI3 : MipsReg<3, "ac3">, DwarfRegNum<[180]>;
185 def LO0 : MipsReg<0, "ac0">, DwarfRegNum<[65]>;
186 def LO1 : MipsReg<1, "ac1">, DwarfRegNum<[177]>;
187 def LO2 : MipsReg<2, "ac2">, DwarfRegNum<[179]>;
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVRegisterInfo.td80 def X0 : RISCVReg<0, "x0", ["zero"]>, DwarfRegNum<[0]>;
82 def X1 : RISCVReg<1, "x1", ["ra"]>, DwarfRegNum<[1]>;
83 def X2 : RISCVReg<2, "x2", ["sp"]>, DwarfRegNum<[2]>;
84 def X3 : RISCVReg<3, "x3", ["gp"]>, DwarfRegNum<[3]>;
85 def X4 : RISCVReg<4, "x4", ["tp"]>, DwarfRegNum<[4]>;
86 def X5 : RISCVReg<5, "x5", ["t0"]>, DwarfRegNum<[5]>;
87 def X6 : RISCVReg<6, "x6", ["t1"]>, DwarfRegNum<[6]>;
88 def X7 : RISCVReg<7, "x7", ["t2"]>, DwarfRegNum<[7]>;
91 def X9 : RISCVReg<9, "x9", ["s1"]>, DwarfRegNum<[9]>;
239 DwarfRegNum<[!add(Index, 32)]>;
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86RegisterInfo.td192 def MM0 : X86Reg<"mm0", 0>, DwarfRegNum<[41, 29, 29]>;
193 def MM1 : X86Reg<"mm1", 1>, DwarfRegNum<[42, 30, 30]>;
194 def MM2 : X86Reg<"mm2", 2>, DwarfRegNum<[43, 31, 31]>;
195 def MM3 : X86Reg<"mm3", 3>, DwarfRegNum<[44, 32, 32]>;
196 def MM4 : X86Reg<"mm4", 4>, DwarfRegNum<[45, 33, 33]>;
197 def MM5 : X86Reg<"mm5", 5>, DwarfRegNum<[46, 34, 34]>;
198 def MM6 : X86Reg<"mm6", 6>, DwarfRegNum<[47, 35, 35]>;
199 def MM7 : X86Reg<"mm7", 7>, DwarfRegNum<[48, 36, 36]>;
212 def XMM0: X86Reg<"xmm0", 0>, DwarfRegNum<[17, 21, 21]>;
213 def XMM1: X86Reg<"xmm1", 1>, DwarfRegNum<[18, 22, 22]>;
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64RegisterInfo.td68 def W0 : AArch64Reg<0, "w0" >, DwarfRegNum<[0]>;
69 def W1 : AArch64Reg<1, "w1" >, DwarfRegNum<[1]>;
70 def W2 : AArch64Reg<2, "w2" >, DwarfRegNum<[2]>;
71 def W3 : AArch64Reg<3, "w3" >, DwarfRegNum<[3]>;
72 def W4 : AArch64Reg<4, "w4" >, DwarfRegNum<[4]>;
73 def W5 : AArch64Reg<5, "w5" >, DwarfRegNum<[5]>;
74 def W6 : AArch64Reg<6, "w6" >, DwarfRegNum<[6]>;
75 def W7 : AArch64Reg<7, "w7" >, DwarfRegNum<[7]>;
76 def W8 : AArch64Reg<8, "w8" >, DwarfRegNum<[8]>;
142 def FFR : AArch64Reg<0, "ffr">, DwarfRegNum<[47]>;
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H A DAArch64ISelLowering.cpp7875 unsigned DwarfRegNum = MRI->getDwarfRegNum(Reg, false); in getRegisterByName() local
7876 if (!Subtarget->isXRegisterReserved(DwarfRegNum)) in getRegisterByName()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCRegisterInfo.td141 DwarfRegNum<[Index, -2]>;
187 DwarfRegNum<[-1, -1]>;
195 DwarfRegNum<[-1, -1]>;
263 def LR : SPR<8, "lr">, DwarfRegNum<[-2, 65]>;
265 def LR8 : SPR<8, "lr">, DwarfRegNum<[65, -2]>;
268 def CTR : SPR<9, "ctr">, DwarfRegNum<[-2, 66]>;
269 def CTR8 : SPR<9, "ctr">, DwarfRegNum<[66, -2]>;
272 def VRSAVE: SPR<256, "vrsave">, DwarfRegNum<[109]>;
277 def SPEACC: DwarfRegNum<[99, 111]>;
280 def XER: SPR<1, "xer">, DwarfRegNum<[76]>;
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMRegisterInfo.td77 def R0 : ARMReg< 0, "r0">, DwarfRegNum<[0]>;
78 def R1 : ARMReg< 1, "r1">, DwarfRegNum<[1]>;
79 def R2 : ARMReg< 2, "r2">, DwarfRegNum<[2]>;
80 def R3 : ARMReg< 3, "r3">, DwarfRegNum<[3]>;
81 def R4 : ARMReg< 4, "r4">, DwarfRegNum<[4]>;
82 def R5 : ARMReg< 5, "r5">, DwarfRegNum<[5]>;
83 def R6 : ARMReg< 6, "r6">, DwarfRegNum<[6]>;
84 def R7 : ARMReg< 7, "r7">, DwarfRegNum<[7]>;
87 def R8 : ARMReg< 8, "r8">, DwarfRegNum<[8]>;
88 def R9 : ARMReg< 9, "r9">, DwarfRegNum<[9]>;
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/VE/
H A DVERegisterInfo.td105 def SW#I : VEReg<I, "sw"#I, [], ["s"#I]>, DwarfRegNum<[I]>;
112 DwarfRegNum<[I]>;
117 def SX8 : VEReg<8, "s8", [SW8, SF8], ["s8", "sl"]>, DwarfRegNum<[8]>;
118 def SX9 : VEReg<9, "s9", [SW9, SF9], ["s9", "fp"]>, DwarfRegNum<[9]>;
119 def SX10 : VEReg<10, "s10", [SW10, SF10], ["s10", "lr"]>, DwarfRegNum<[10]>;
120 def SX11 : VEReg<11, "s11", [SW11, SF11], ["s11", "sp"]>, DwarfRegNum<[11]>;
121 def SX14 : VEReg<14, "s14", [SW14, SF14], ["s14", "tp"]>, DwarfRegNum<[14]>;
122 def SX15 : VEReg<15, "s15", [SW15, SF15], ["s15", "got"]>, DwarfRegNum<[15]>;
128 ["s"#I]>, DwarfRegNum<[I]>;
145 def V#I : VEVecReg<I, "v"#I, [], ["v"#I]>, DwarfRegNum<[!add(64,I)]>;
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/DebugInfo/DWARF/
H A DDWARFExpression.cpp234 uint64_t DwarfRegNum; in prettyPrintRegisterOp() local
239 DwarfRegNum = Operands[OpNum++]; in prettyPrintRegisterOp()
241 DwarfRegNum = Opcode - DW_OP_breg0; in prettyPrintRegisterOp()
243 DwarfRegNum = Opcode - DW_OP_reg0; in prettyPrintRegisterOp()
419 uint64_t DwarfRegNum = Op.getRawOperand(0); in printCompactDWARFExpr() local
422 OS << "<unknown register " << DwarfRegNum << ">"; in printCompactDWARFExpr()
430 int DwarfRegNum = Op.getRawOperand(0); in printCompactDWARFExpr() local
434 OS << "<unknown register " << DwarfRegNum << ">"; in printCompactDWARFExpr()
468 uint64_t DwarfRegNum = Opcode - dwarf::DW_OP_reg0; in printCompactDWARFExpr() local
471 OS << "<unknown register " << DwarfRegNum << ">"; in printCompactDWARFExpr()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/
H A DStackMaps.cpp249 unsigned DwarfRegNum = getDwarfRegNum(MOI->getReg(), TRI); in parseOperand() local
250 unsigned LLVMRegNum = *TRI->getLLVMRegNum(DwarfRegNum, false); in parseOperand()
256 DwarfRegNum, Offset); in parseOperand()
330 OS << "\t[encoding: .short " << LO.DwarfRegNum << ", .byte 0, .byte " in print()
340 unsigned DwarfRegNum = getDwarfRegNum(Reg, TRI); in createLiveOutReg() local
342 return LiveOutReg(Reg, DwarfRegNum, Size); in createLiveOutReg()
364 return LHS.DwarfRegNum < RHS.DwarfRegNum; in parseRegisterLiveOutMask()
369 if (I->DwarfRegNum != II->DwarfRegNum) { in parseRegisterLiveOutMask()
698 OS.emitInt16(LO.DwarfRegNum); in emitCallsiteEntries()
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DStackMaps.h274 unsigned short DwarfRegNum = 0; member
278 LiveOutReg(unsigned short Reg, unsigned short DwarfRegNum, in LiveOutReg()
280 : Reg(Reg), DwarfRegNum(DwarfRegNum), Size(Size) {} in LiveOutReg()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFRegisterInfo.td33 def W#I : Wi<I, "w"#I>, DwarfRegNum<[I]>;
35 def R#I : Ri<I, "r"#I, [!cast<Wi>("W"#I)]>, DwarfRegNum<[I]>;
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZRegisterInfo.td87 DwarfRegNum<[I]>;
228 DwarfRegNum<[!cast<DwarfMapping>("F"#I#"Dwarf").Id]>;
233 DwarfRegNum<[!cast<DwarfMapping>("F"#I#"Dwarf").Id]>;
262 DwarfRegNum<[!cast<DwarfMapping>("F"#I#"Dwarf").Id]>;
336 def A#I : ACR32<I, "a"#I>, DwarfRegNum<[!add(I, 48)]>;
346 def C#I : CREG64<I, "c"#I>, DwarfRegNum<[!add(I, 32)]>;
/freebsd-13.1/contrib/llvm-project/llvm/utils/TableGen/
H A DRegisterInfoEmitter.cpp401 for (auto &DwarfRegNum : DwarfRegNums) in EmitRegMappingTables() local
402 for (unsigned I = DwarfRegNum.second.size(), E = maxLength; I != E; ++I) in EmitRegMappingTables()
403 DwarfRegNum.second.push_back(-1); in EmitRegMappingTables()
422 for (auto &DwarfRegNum : DwarfRegNums) { in EmitRegMappingTables() local
423 int DwarfRegNo = DwarfRegNum.second[I]; in EmitRegMappingTables()
426 Dwarf2LMap[DwarfRegNo] = DwarfRegNum.first; in EmitRegMappingTables()
483 for (auto &DwarfRegNum : DwarfRegNums) { in EmitRegMappingTables() local
484 int RegNo = DwarfRegNum.second[i]; in EmitRegMappingTables()
488 OS << " { " << getQualifiedName(DwarfRegNum.first) << ", " << RegNo in EmitRegMappingTables()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiRegisterInfo.td26 def R#i : LanaiReg<i, "r"#i>, DwarfRegNum<[i]>;
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIRegisterInfo.td169 def PC_REG : SIReg<"pc", 0>, DwarfRegNum<[16, 16]> {
183 defm EXEC_LO : SIRegLoHi16<"exec_lo", 126>, DwarfRegNum<[1, 1]>;
186 def EXEC : RegisterWithSubRegs<"exec", [EXEC_LO, EXEC_HI]>, DwarfRegNum<[17, 1]> {
280 DwarfRegNum<[!if(!le(Index, 63), !add(Index, 32), !add(Index, 1024)),
288 DwarfRegNum<[!add(Index, 2560), !add(Index, 1536)]>;
295 DwarfRegNum<[!add(Index, 3072), !add(Index, 2048)]>;
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kRegisterInfo.td19 : Register<N, ALTNAMES>, DwarfRegNum<DWREGS> {
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/Target/
H A DTarget.td391 // DwarfRegNum - This class provides a mapping of the llvm register enumeration
395 class DwarfRegNum<list<int> Numbers> {