Searched refs:DemandedSrc (Results 1 – 3 of 3) sorted by relevance
| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 1090 SDValue DemandedSrc = SimplifyMultipleUseDemandedBits( in SimplifyDemandedBits() local 1092 if (DemandedSrc) { in SimplifyDemandedBits() 1093 SDValue NewOp = TLO.DAG.getNode(Op.getOpcode(), dl, VT, DemandedSrc, in SimplifyDemandedBits() 2092 if (SDValue DemandedSrc = SimplifyMultipleUseDemandedBits( in SimplifyDemandedBits() local 2095 TLO.DAG.getNode(Op.getOpcode(), dl, VT, DemandedSrc, Idx); in SimplifyDemandedBits()
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 10777 if (SDValue DemandedSrc = in performCvtF32UByteNCombine() local 10779 return DAG.getNode(N->getOpcode(), SL, MVT::f32, DemandedSrc); in performCvtF32UByteNCombine()
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 35037 APInt DemandedSrc = DemandedElts.zextOrTrunc(SrcVT.getVectorNumElements()); in ComputeNumSignBitsForTargetNode() local 35038 unsigned Tmp = DAG.ComputeNumSignBits(Src, DemandedSrc, Depth + 1); in ComputeNumSignBitsForTargetNode() 38749 APInt DemandedSrc = DemandedElts.lshr(ShiftAmt); in SimplifyDemandedVectorEltsForTargetNode() local 38750 if (SimplifyDemandedVectorElts(Src, DemandedSrc, KnownUndef, KnownZero, TLO, in SimplifyDemandedVectorEltsForTargetNode() 38788 APInt DemandedSrc = DemandedElts.shl(ShiftAmt); in SimplifyDemandedVectorEltsForTargetNode() local 38789 if (SimplifyDemandedVectorElts(Src, DemandedSrc, KnownUndef, KnownZero, TLO, in SimplifyDemandedVectorEltsForTargetNode() 38886 APInt DemandedSrc = DemandedElts.zextOrTrunc(SrcVT.getVectorNumElements()); in SimplifyDemandedVectorEltsForTargetNode() local 38888 if (SimplifyDemandedVectorElts(Src, DemandedSrc, SrcUndef, SrcZero, TLO, in SimplifyDemandedVectorEltsForTargetNode()
|