| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | DetectDeadLanes.cpp | 250 Register DefReg = Def.getReg(); in transferUsedLanes() local 251 const TargetRegisterClass *RC = MRI->getRegClass(DefReg); in transferUsedLanes() 285 Register DefReg = Def.getReg(); in transferDefinedLanesStep() local 286 if (!Register::isVirtualRegister(DefReg)) in transferDefinedLanesStep() 288 unsigned DefRegIdx = Register::virtReg2Index(DefReg); in transferDefinedLanesStep() 428 Register DefReg = Def.getReg(); in determineInitialUsedLanes() local 431 if (Register::isVirtualRegister(DefReg)) { in determineInitialUsedLanes() 470 Register DefReg = Def.getReg(); in isUndefInput() local 471 if (!Register::isVirtualRegister(DefReg)) in isUndefInput() 473 unsigned DefRegIdx = Register::virtReg2Index(DefReg); in isUndefInput() [all …]
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| H A D | TailDuplicator.cpp | 357 Register DefReg = MI->getOperand(0).getReg(); in processPHI() local 362 const TargetRegisterClass *RC = MRI->getRegClass(DefReg); in processPHI() 363 LocalVRMap.insert(std::make_pair(DefReg, RegSubRegPair(SrcReg, SrcSubReg))); in processPHI() 369 if (isDefLiveOut(DefReg, TailBB, MRI) || RegsUsedByPhi.count(DefReg)) in processPHI() 370 addSSAUpdateEntry(DefReg, NewDef, PredBB); in processPHI()
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| H A D | ImplicitNullChecks.cpp | 718 unsigned DefReg = NoRegister; in insertFaultingInstr() local 720 DefReg = MI->getOperand(0).getReg(); in insertFaultingInstr() 731 auto MIB = BuildMI(MBB, DL, TII->get(TargetOpcode::FAULTING_OP), DefReg) in insertFaultingInstr()
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| H A D | LiveVariables.cpp | 216 Register DefReg = MO.getReg(); in FindLastPartialDef() local 217 if (TRI->isSubRegister(Reg, DefReg)) { in FindLastPartialDef() 218 for (MCSubRegIterator SubRegs(DefReg, TRI, /*IncludeSelf=*/true); in FindLastPartialDef()
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| H A D | TargetInstrInfo.cpp | 926 Register DefReg = MI.getOperand(0).getReg(); in isReallyTriviallyReMaterializableGeneric() local 932 if (Register::isVirtualRegister(DefReg) && MI.getOperand(0).getSubReg() && in isReallyTriviallyReMaterializableGeneric() 933 MI.readsVirtualRegister(DefReg)) in isReallyTriviallyReMaterializableGeneric() 984 if (MO.isDef() && Reg != DefReg) in isReallyTriviallyReMaterializableGeneric()
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| H A D | PHIElimination.cpp | 203 Register DefReg = DefMI->getOperand(0).getReg(); in runOnMachineFunction() local 204 if (MRI->use_nodbg_empty(DefReg)) { in runOnMachineFunction()
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| H A D | MachineSink.cpp | 1606 for (auto DefReg : DefedRegsInCopy) { in getSingleLiveInSuccBB() local 1608 getSingleLiveInSuccBB(CurBB, SinkableBBs, DefReg, TRI); in getSingleLiveInSuccBB() 1641 for (unsigned DefReg : DefedRegsInCopy) in updateLiveIn() local 1642 for (MCSubRegIterator S(DefReg, TRI, true); S.isValid(); ++S) in updateLiveIn()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyRegStackify.cpp | 469 Register DefReg = MO.getReg(); in oneUseDominatesOtherUses() local 470 if (!Register::isVirtualRegister(DefReg) || in oneUseDominatesOtherUses() 471 !MFI.isVRegStackified(DefReg)) in oneUseDominatesOtherUses() 473 assert(MRI.hasOneNonDBGUse(DefReg)); in oneUseDominatesOtherUses() 648 DefMO.setReg(DefReg); in moveAndTeeForMultiUse() 664 LIS.createAndComputeVirtRegInterval(DefReg); in moveAndTeeForMultiUse() 665 MFI.stackifyVReg(MRI, DefReg); in moveAndTeeForMultiUse() 670 DefDIs.clone(Tee, DefReg); in moveAndTeeForMultiUse() 908 unsigned DefReg = SubsequentDef->getReg(); in runOnMachineFunction() local 911 if (DefReg != UseReg || !MRI.hasOneUse(DefReg)) in runOnMachineFunction() [all …]
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| H A D | WebAssemblyExplicitLocals.cpp | 192 for (auto DefReg : Def->defs()) { in findStartOfTree() local 193 if (!MFI.isVRegStackified(DefReg.getReg())) { in findStartOfTree()
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| H A D | WebAssemblyCFGStackify.cpp | 851 Register DefReg = MI.getOperand(2).getReg(); in unstackifyVRegsUsedInSplitBB() local 854 MFI.unstackifyVReg(DefReg); in unstackifyVRegsUsedInSplitBB() 855 unsigned CopyOpc = getCopyOpcode(MRI.getRegClass(DefReg)); in unstackifyVRegsUsedInSplitBB() 857 .addReg(DefReg); in unstackifyVRegsUsedInSplitBB() 858 BuildMI(MBB, &MI, MI.getDebugLoc(), TII.get(CopyOpc), Reg).addReg(DefReg); in unstackifyVRegsUsedInSplitBB()
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| /freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | LegalizationArtifactCombiner.h | 400 Register DefReg = MI.getOperand(I).getReg(); in tryFoldUnmergeCast() local 401 UpdatedDefs.push_back(DefReg); in tryFoldUnmergeCast() 721 if (MO.getReg() == DefReg) in findValueFromDef() 734 return DefReg; in findValueFromDef() 769 Register DefReg = MI.getReg(DefIdx); in tryCombineUnmergeValues() local 772 if (!FoundVal || FoundVal == DefReg) in tryCombineUnmergeValues() 781 MI.getOperand(DefIdx).setReg(DefReg); in tryCombineUnmergeValues() 931 Register DefReg = MI.getReg(DefIdx); in tryCombineUnmergeValues() local 932 Builder.buildMerge(DefReg, Regs); in tryCombineUnmergeValues() 933 UpdatedDefs.push_back(DefReg); in tryCombineUnmergeValues() [all …]
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64RedundantCopyElimination.cpp | 382 Register DefReg = MI->getOperand(0).getReg(); in optimizeBlock() local 385 if (!MRI->isReserved(DefReg) && in optimizeBlock() 389 if (KnownReg.Reg != DefReg && in optimizeBlock() 390 !TRI->isSuperRegister(DefReg, KnownReg.Reg)) in optimizeBlock() 414 if (TRI->isSuperRegister(DefReg, KnownReg.Reg) && KnownReg.Imm < 0) in optimizeBlock()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstructionSelector.cpp | 508 const Register DefReg = I.getOperand(0).getReg(); in selectLoadStoreOp() local 509 LLT Ty = MRI.getType(DefReg); in selectLoadStoreOp() 546 addFullAddress(MIB, AM).addUse(DefReg); in selectLoadStoreOp() 569 LLT Ty = MRI.getType(DefReg); in selectFrameIndexOrGep() 622 LLT Ty = MRI.getType(DefReg); in selectGlobalValue() 641 LLT Ty = MRI.getType(DefReg); in selectConstant() 811 Register DefReg = SrcReg; in selectZext() local 828 .addReg(DefReg) in selectZext() 1327 MRI.setRegBank(DefReg, RegBank); in selectMergeValues() 1341 DefReg = Tmp; in selectMergeValues() [all …]
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| H A D | X86DomainReassignment.cpp | 592 Register DefReg = DefOp.getReg(); in buildClosure() local 593 if (!DefReg.isVirtual()) { in buildClosure() 597 visitRegister(C, DefReg, Domain, Worklist); in buildClosure()
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| H A D | X86LoadValueInjectionLoadHardening.cpp | 370 RegisterRef DefReg = Def.Addr->getRegRef(DFG); in getGadgetGraph() local 371 for (auto UseID : L.getAllReachedUses(DefReg, Def)) { in getGadgetGraph() 376 if (DFG.getPRI().alias(RegisterRef(I.first), DefReg)) { in getGadgetGraph()
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| H A D | X86SpeculativeLoadHardening.cpp | 1786 Register DefReg = MI.getOperand(0).getReg(); in sinkPostLoadHardenedInst() local 1792 for (MachineInstr &UseMI : MRI->use_instructions(DefReg)) { in sinkPostLoadHardenedInst() 1817 if ((BaseMO.isReg() && BaseMO.getReg() == DefReg) || in sinkPostLoadHardenedInst() 1818 (IndexMO.isReg() && IndexMO.getReg() == DefReg)) in sinkPostLoadHardenedInst()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCPreEmitPeephole.cpp | 253 Register DefReg; in addLinkerOpt() member 285 if (!BBI->readsRegister(Pair.DefReg, TRI) && in addLinkerOpt() 286 !BBI->modifiesRegister(Pair.DefReg, TRI)) in addLinkerOpt() 295 if (UseOp && UseOp->isReg() && UseOp->getReg() == Pair.DefReg && in addLinkerOpt()
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| H A D | PPCVSXSwapRemoval.cpp | 671 Register DefReg = MI->getOperand(0).getReg(); in recordUnoptimizableWebs() local 677 for (MachineInstr &UseMI : MRI->use_nodbg_instructions(DefReg)) { in recordUnoptimizableWebs() 724 Register DefReg = DefMI->getOperand(0).getReg(); in recordUnoptimizableWebs() local 743 for (MachineInstr &UseMI : MRI->use_nodbg_instructions(DefReg)) { in recordUnoptimizableWebs() 783 Register DefReg = MI->getOperand(0).getReg(); in markSwapsForRemoval() local 785 for (MachineInstr &UseMI : MRI->use_nodbg_instructions(DefReg)) { in markSwapsForRemoval()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | Mips16InstrInfo.cpp | 369 int DefReg = 0; in loadImmediate() local 373 DefReg = MO.getReg(); in loadImmediate() 392 if (DefReg != Reg) { in loadImmediate() 407 if (DefReg!= SpReg) { in loadImmediate()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 2179 Register DefReg = I.getOperand(0).getReg(); in earlySelect() local 2180 LLT Ty = MRI.getType(DefReg); in earlySelect() 2294 const LLT DefTy = MRI.getType(DefReg); in select() 2297 MRI.getRegClassOrRegBank(DefReg); in select() 2461 const LLT DefTy = MRI.getType(DefReg); in select() 2537 MIB.buildCopy({DefReg}, {DefGPRReg}); in select() 3060 const LLT DstTy = MRI.getType(DefReg); in select() 3157 {DefReg}, {SrcReg}) in select() 3162 {DefReg}, {SrcReg}) in select() 5348 Register DefReg = MI.getOperand(0).getReg(); in isWorthFoldingIntoExtendedReg() local [all …]
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIFoldOperands.cpp | 1680 Register DefReg = Def.getReg(); in tryFoldLoad() local 1682 if (DefReg.isPhysical() || !TRI->isVGPR(*MRI, DefReg)) in tryFoldLoad() 1687 for (const MachineInstr &I : MRI->use_nodbg_instructions(DefReg)) { in tryFoldLoad() 1707 const TargetRegisterClass *RC = MRI->getRegClass(DefReg); in tryFoldLoad() 1708 MRI->setRegClass(DefReg, TRI->getEquivalentAGPRClass(RC)); in tryFoldLoad() 1710 MRI->setRegClass(DefReg, RC); in tryFoldLoad()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 178 static bool isRegUsedByPhiNodes(Register DefReg, in isRegUsedByPhiNodes() argument 181 if (P.second == DefReg) in isRegUsedByPhiNodes() 202 Register DefReg = findLocalRegDef(LocalMI); in flushLocalValueMap() local 203 if (!DefReg) in flushLocalValueMap() 205 if (FuncInfo.RegsWithFixups.count(DefReg)) in flushLocalValueMap() 207 bool UsedByPHI = isRegUsedByPhiNodes(DefReg, FuncInfo); in flushLocalValueMap() 208 if (!UsedByPHI && MRI.use_nodbg_empty(DefReg)) { in flushLocalValueMap()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonBitTracker.cpp | 1039 unsigned DefReg = 0; in getUniqueDefVReg() local 1046 if (DefReg != 0) in getUniqueDefVReg() 1048 DefReg = R; in getUniqueDefVReg() 1050 return DefReg; in getUniqueDefVReg()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | A15SDOptimizer.cpp | 215 Register DefReg = MODef.getReg(); in eraseInstrWithNoUses() local 216 if (!Register::isVirtualRegister(DefReg)) { in eraseInstrWithNoUses()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | RegBankSelect.cpp | 204 for (Register DefReg : NewVRegs) in repairReg() local 205 UnMergeBuilder.addDef(DefReg); in repairReg()
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