| /freebsd-13.1/sys/arm/include/ |
| H A D | asm.h | 238 #define DMB dmb macro
252 #define DMB mcr CP15_CP15DMB macro
257 #define DMB mcr CP15_CP15DSB /* same prior to v6.*/ macro
|
| /freebsd-13.1/sys/arm/arm/ |
| H A D | swtch-v6.S | 280 DMB
424 DMB
429 DMB
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMOptimizeBarriersPass.cpp | 67 if (MI.getOpcode() == ARM::DMB) { in runOnMachineFunction()
|
| H A D | ARMScheduleA57.td | 118 "(t2)?CPS[123]p$", "(t2)?DBG$", "(t2)?DMB$", "(t2)?DSB$", "ERET$",
|
| H A D | ARMInstrInfo.td | 5092 def DMB : AInoP<(outs), (ins memb_opt:$opt), MiscFrm, NoItinerary,
6180 def : InstAlias<"dmb", (DMB 0xf), 0>, Requires<[IsARM, HasDB]>;
|
| H A D | ARMISelLowering.cpp | 20011 Function *DMB = Intrinsic::getDeclaration(M, Intrinsic::arm_dmb); in makeDMB() local
20015 return Builder.CreateCall(DMB, CDomain); in makeDMB()
|
| /freebsd-13.1/contrib/file/magic/Magdir/ |
| H A D | animation | 126 >8 string da0a \b, DMB MAF w/ MPEG Layer II aud, MOT slides, DLS, JPG/PNG/MNG
127 >8 string da0b \b, DMB MAF, ext DA0A, with 3GPP timed text, DID, TVA, REL, IPMP
128 >8 string da1a \b, DMB MAF audio with ER-BSAC audio, JPG/PNG/MNG images
129 >8 string da1b \b, DMB MAF, ext da1a, with 3GPP timed text, DID, TVA, REL, IPMP
130 >8 string da2a \b, DMB MAF aud w/ HE-AAC v2 aud, MOT slides, DLS, JPG/PNG/MNG
131 >8 string da2b \b, DMB MAF, ext da2a, with 3GPP timed text, DID, TVA, REL, IPMP
132 >8 string da3a \b, DMB MAF aud with HE-AAC aud, JPG/PNG/MNG images
133 >8 string da3b \b, DMB MAF, ext da3a w/ BIFS, 3GPP, DID, TVA, REL, IPMP
142 >8 string dmb1 \b, DMB MAF supporting all the components defined in the spec
145 >8 string dv1a \b, DMB MAF vid w/ AVC vid, ER-BSAC aud, BIFS, JPG/PNG/MNG, TS
[all …]
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrAtomics.td | 19 def : Pat<(atomic_fence (i64 4), (timm)), (DMB (i32 0x9))>;
20 def : Pat<(atomic_fence (timm), (timm)), (DMB (i32 0xb))>;
|
| H A D | AArch64SchedCyclone.td | 295 // SLREX,DMB,DSB
|
| H A D | AArch64SchedFalkorDetails.td | 1244 def : InstRW<[FalkorWr_1LD_0cyc], (instrs CLREX, DMB, DSB)>;
|
| H A D | AArch64SchedKryoDetails.td | 567 (instrs DSB, DMB, CLREX)>;
|
| H A D | AArch64SystemOperands.td | 77 // DMB/DSB (data barrier) instruction options.
|
| H A D | AArch64InstrInfo.td | 807 def DMB : CRmSystemI<barrier_op, 0b101, "dmb",
|