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/freebsd-13.1/crypto/heimdal/doc/doxyout/ntlm/html/
H A Dtabs.css3 DIV.tabs
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25 DIV.tabs FORM
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45 DIV.tabs A:link, DIV.tabs A:visited,
46 DIV.tabs A:active, DIV.tabs A:hover
51 DIV.tabs SPAN
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H A Ddoxygen.css1 BODY,H1,H2,H3,H4,H5,H6,P,CENTER,TD,TH,UL,DL,DIV { selector
20 DIV.qindex {
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/freebsd-13.1/crypto/heimdal/doc/doxyout/wind/html/
H A Dtabs.css3 DIV.tabs
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25 DIV.tabs FORM
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45 DIV.tabs A:link, DIV.tabs A:visited,
46 DIV.tabs A:active, DIV.tabs A:hover
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H A Ddoxygen.css1 BODY,H1,H2,H3,H4,H5,H6,P,CENTER,TD,TH,UL,DL,DIV { selector
20 DIV.qindex {
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/freebsd-13.1/crypto/heimdal/doc/doxyout/hcrypto/html/
H A Dtabs.css3 DIV.tabs
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25 DIV.tabs FORM
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45 DIV.tabs A:link, DIV.tabs A:visited,
46 DIV.tabs A:active, DIV.tabs A:hover
51 DIV.tabs SPAN
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H A Ddoxygen.css1 BODY,H1,H2,H3,H4,H5,H6,P,CENTER,TD,TH,UL,DL,DIV { selector
20 DIV.qindex {
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128 DIV.ah {
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/freebsd-13.1/crypto/heimdal/doc/doxyout/gssapi/html/
H A Dtabs.css3 DIV.tabs
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45 DIV.tabs A:link, DIV.tabs A:visited,
46 DIV.tabs A:active, DIV.tabs A:hover
51 DIV.tabs SPAN
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67 DIV.tabs TD
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H A Ddoxygen.css1 BODY,H1,H2,H3,H4,H5,H6,P,CENTER,TD,TH,UL,DL,DIV { selector
20 DIV.qindex {
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/freebsd-13.1/crypto/heimdal/doc/doxyout/krb5/html/
H A Dtabs.css3 DIV.tabs
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H A Ddoxygen.css1 BODY,H1,H2,H3,H4,H5,H6,P,CENTER,TD,TH,UL,DL,DIV { selector
20 DIV.qindex {
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38 DIV.navtab {
128 DIV.ah {
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142 DIV.groupText {
/freebsd-13.1/crypto/heimdal/doc/doxyout/hdb/html/
H A Dtabs.css3 DIV.tabs
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45 DIV.tabs A:link, DIV.tabs A:visited,
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51 DIV.tabs SPAN
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/freebsd-13.1/crypto/heimdal/doc/doxyout/hx509/html/
H A Dtabs.css3 DIV.tabs
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25 DIV.tabs FORM
30 DIV.tabs A
45 DIV.tabs A:link, DIV.tabs A:visited,
46 DIV.tabs A:active, DIV.tabs A:hover
51 DIV.tabs SPAN
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H A Ddoxygen.css1 BODY,H1,H2,H3,H4,H5,H6,P,CENTER,TD,TH,UL,DL,DIV { selector
20 DIV.qindex {
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38 DIV.navtab {
128 DIV.ah {
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/freebsd-13.1/contrib/byacc/test/btyacc/
H A Dquote_calc2.output86 "DIV" reduce 15
126 "DIV" shift 19
141 "DIV" reduce 16
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H A Dquote_calc2-s.output86 "DIV" reduce 15
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H A Dquote_calc4-s.output86 "DIV-operator" reduce 15
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H A Dquote_calc4.output86 "DIV-operator" reduce 15
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/freebsd-13.1/contrib/byacc/test/yacc/
H A Dquote_calc2.output86 "DIV" reduce 15
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H A Dquote_calc2-s.output86 "DIV" reduce 15
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H A Dquote_calc4-s.output86 "DIV-operator" reduce 15
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H A Dquote_calc4.output86 "DIV-operator" reduce 15
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/freebsd-13.1/sys/mips/ingenic/
H A Djz4780_clock.c169 DIV(JZ_CPCCR, 0, 0, 4, 22, -1, -1),
176 DIV(JZ_CPCCR, 4, 0, 4, -1, -1, -1),
183 DIV(JZ_CPCCR, 8, 0, 4, 21, -1, -1),
197 DIV(JZ_CPCCR, 12, 0, 4, 20, -1, -1),
204 DIV(JZ_CPCCR, 16, 0, 4, 20, -1, -1),
211 DIV(JZ_DDCDR, 0, 0, 4, 29, 28, 27),
218 DIV(JZ_VPUCDR, 0, 0, 4, 29, 28, 27),
225 DIV(JZ_I2SCDR, 0, 0, 8, 29, 28, 27),
239 DIV(JZ_LP0CDR, 0, 0, 8, 28, 27, 26),
246 DIV(JZ_LP1CDR, 0, 0, 8, 28, 27, 26),
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/freebsd-13.1/sys/arm64/freescale/imx/
H A Dimx8mq_ccm.c148 DIV(IMX8MQ_ARM_PLL_REF_DIV, "arm_pll_ref_div", "arm_pll_ref_sel", 0x28, 5, 6),
149 DIV(IMX8MQ_GPU_PLL_REF_DIV, "gpu_pll_ref_div", "gpu_pll_ref_sel", 0x18, 5, 6),
150 DIV(IMX8MQ_VPU_PLL_REF_DIV, "vpu_pll_ref_div", "vpu_pll_ref_sel", 0x20, 5, 6),
151 DIV(IMX8MQ_AUDIO_PLL1_REF_DIV, "audio_pll1_ref_div", "audio_pll1_ref_sel", 0x0, 5, 6),
152 DIV(IMX8MQ_AUDIO_PLL2_REF_DIV, "audio_pll2_ref_div", "audio_pll2_ref_sel", 0x8, 5, 6),
153 DIV(IMX8MQ_VIDEO_PLL1_REF_DIV, "video_pll1_ref_div", "video_pll1_ref_sel", 0x10, 5, 6),
218 DIV(IMX8MQ_CLK_IPG_ROOT, "ipg_root", "ahb", 0x9080, 0, 1),
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCScheduleP9.td100 // Two DIV (Fixed Point Divide) units.
101 def DIV : ProcResource<2>;
219 // DIV Unit
220 // A DIV unit may take from 5 to 40 cycles to complete.
221 // Some DIV operations may keep the unit busy for up to 8 cycles.
222 def P9_DIV_5C : SchedWriteRes<[DIV]> {
226 def P9_DIV_12C : SchedWriteRes<[DIV]> {
230 def P9_DIV_16C_8 : SchedWriteRes<[DIV]> {
235 def P9_DIV_24C_8 : SchedWriteRes<[DIV]> {
240 def P9_DIV_40C_8 : SchedWriteRes<[DIV]> {
H A DP9InstrResources.td922 // 5 Cycle DIV operation. Only one DIV unit per superslice so we use the whole
931 // 12 Cycle DIV operation. Only one DIV unit per superslice so we use the whole
944 // 16 Cycle DIV operation. Only one DIV unit per superslice so we use the whole
956 // 24 Cycle DIV operation. Only one DIV unit per superslice so we use the whole
974 // 40 Cycle DIV operation. Only one DIV unit per superslice so we use the whole
986 // and one full superslice for the DIV operation since there is only one DIV per
987 // superslice. Latency of DIV plus ALU is 26.
995 // and one full superslice for the DIV operation since there is only one DIV per
996 // superslice. Latency of DIV plus ALU is 26.
1011 // and one full superslice for the DIV operation since there is only one DIV per
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