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Searched refs:CondRegs (Results 1 – 2 of 2) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86FlagsCopyLowering.cpp116 CondRegArray &CondRegs);
120 MachineOperand &FlagUse, CondRegArray &CondRegs);
124 CondRegArray &CondRegs);
644 CondRegs); in runOnMachineFunction()
735 CondRegArray CondRegs = {}; in collectCondsInRegs() local
745 CondRegs[Cond] = MI.getOperand(0).getReg(); in collectCondsInRegs()
753 return CondRegs; in collectCondsInRegs()
771 unsigned &CondReg = CondRegs[Cond]; in getCondOrInverseInReg()
795 CondRegArray &CondRegs) { in rewriteArithmetic() argument
827 unsigned &CondReg = CondRegs[Cond]; in rewriteArithmetic()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPURegisterBankInfo.cpp2238 SmallVector<Register, 1> CondRegs(OpdMapper.getVRegs(1)); in applyMappingImpl() local
2239 if (CondRegs.empty()) in applyMappingImpl()
2240 CondRegs.push_back(MI.getOperand(1).getReg()); in applyMappingImpl()
2242 assert(CondRegs.size() == 1); in applyMappingImpl()
2245 const RegisterBank *CondBank = getRegBank(CondRegs[0], MRI, *TRI); in applyMappingImpl()
2253 B.buildZExt(NewCondReg, CondRegs[0]); in applyMappingImpl()
2285 B.buildSelect(DefRegs[0], CondRegs[0], Src1Regs[0], Src2Regs[0]); in applyMappingImpl()
2286 B.buildSelect(DefRegs[1], CondRegs[0], Src1Regs[1], Src2Regs[1]); in applyMappingImpl()