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Searched refs:CondCycles (Results 1 – 8 of 8) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/
H A DEarlyIfConversion.cpp116 int CondCycles, TCycles, FCycles; member
119 : PHI(phi), TReg(0), FReg(0), CondCycles(0), TCycles(0), FCycles(0) {} in PHIInfo()
526 PI.TReg, PI.FReg, PI.CondCycles, PI.TCycles, in canConvertIf()
938 unsigned CondDepth = adjCycles(BranchDepth, PI.CondCycles); in shouldConvertIf()
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetInstrInfo.h877 int &CondCycles, int &TrueCycles, in canInsertSelect() argument
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZInstrInfo.cpp536 Register FalseReg, int &CondCycles, in canInsertSelect() argument
557 CondCycles = 2; in canInsertSelect()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.h305 Register TrueReg, Register FalseReg, int &CondCycles,
H A DSIInstrInfo.cpp2548 Register FalseReg, int &CondCycles, in canInsertSelect() argument
2559 CondCycles = TrueCycles = FalseCycles = NumInsts; // ??? in canInsertSelect()
2579 CondCycles = TrueCycles = FalseCycles = NumInsts; // ??? in canInsertSelect()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.cpp614 Register FalseReg, int &CondCycles, in canInsertSelect() argument
638 CondCycles = 1 + ExtraCondLat; in canInsertSelect()
651 CondCycles = 5 + ExtraCondLat; in canInsertSelect()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.cpp1534 Register FalseReg, int &CondCycles, in canInsertSelect() argument
1562 CondCycles = 1; in canInsertSelect()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrInfo.cpp3361 Register FalseReg, int &CondCycles, in canInsertSelect() argument
3385 CondCycles = 2; in canInsertSelect()