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Searched refs:CondCode (Results 1 – 25 of 114) sorted by relevance

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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64GlobalISelUtils.cpp99 const CmpInst::Predicate P, AArch64CC::CondCode &CondCode, in changeFCMPPredToAArch64CC() argument
106 CondCode = AArch64CC::EQ; in changeFCMPPredToAArch64CC()
109 CondCode = AArch64CC::GT; in changeFCMPPredToAArch64CC()
112 CondCode = AArch64CC::GE; in changeFCMPPredToAArch64CC()
115 CondCode = AArch64CC::MI; in changeFCMPPredToAArch64CC()
118 CondCode = AArch64CC::LS; in changeFCMPPredToAArch64CC()
121 CondCode = AArch64CC::MI; in changeFCMPPredToAArch64CC()
125 CondCode = AArch64CC::VC; in changeFCMPPredToAArch64CC()
128 CondCode = AArch64CC::VS; in changeFCMPPredToAArch64CC()
131 CondCode = AArch64CC::EQ; in changeFCMPPredToAArch64CC()
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H A DAArch64GlobalISelUtils.h63 AArch64CC::CondCode &CondCode,
64 AArch64CC::CondCode &CondCode2);
74 AArch64CC::CondCode &CondCode,
75 AArch64CC::CondCode &CondCode2,
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h1355 enum CondCode { enum
1388 inline bool isSignedIntSetCC(CondCode Code) { in isSignedIntSetCC()
1394 inline bool isUnsignedIntSetCC(CondCode Code) { in isUnsignedIntSetCC()
1400 inline bool isIntEqualitySetCC(CondCode Code) { in isIntEqualitySetCC()
1407 inline bool isTrueWhenEqual(CondCode Cond) { return ((int)Cond & 1) != 0; } in isTrueWhenEqual()
1412 inline unsigned getUnorderedFlavor(CondCode Cond) { in getUnorderedFlavor()
1418 CondCode getSetCCInverse(CondCode Operation, EVT Type);
1427 CondCode getSetCCInverse(CondCode Operation, bool isIntegerLike);
1432 CondCode getSetCCSwappedOperands(CondCode Operation);
1437 CondCode getSetCCOrOperation(CondCode Op1, CondCode Op2, EVT Type);
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H A DAnalysis.h99 ISD::CondCode getFCmpCondCode(FCmpInst::Predicate Pred);
103 ISD::CondCode getFCmpCodeWithoutNaN(ISD::CondCode CC);
108 ISD::CondCode getICmpCondCode(ICmpInst::Predicate Pred);
H A DTargetLowering.h1350 getCondCodeAction(ISD::CondCode CC, MVT VT) const { in getCondCodeAction()
1363 bool isCondCodeLegal(ISD::CondCode CC, MVT VT) const { in isCondCodeLegal()
1369 bool isCondCodeLegalOrCustom(ISD::CondCode CC, MVT VT) const { in isCondCodeLegalOrCustom()
2251 void setCondCodeAction(ISD::CondCode CC, MVT VT, in setCondCodeAction()
2846 void setCmpLibcallCC(RTLIB::Libcall Call, ISD::CondCode CC) { in setCmpLibcallCC()
2852 ISD::CondCode getCmpLibcallCC(RTLIB::Libcall Call) const { in getCmpLibcallCC()
3035 ISD::CondCode CmpLibcallCCs[RTLIB::UNKNOWN_LIBCALL];
3250 SDValue &NewRHS, ISD::CondCode &CCCode,
3255 SDValue &NewRHS, ISD::CondCode &CCCode,
4662 EVT SCCVT, SDValue N0, SDValue N1C, ISD::CondCode Cond,
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SpeculationHardening.cpp154 AArch64CC::CondCode &CondCode) const;
156 AArch64CC::CondCode &CondCode, DebugLoc DL) const;
188 AArch64CC::CondCode &CondCode) const { in endsWithCondControlFlow()
213 CondCode = AArch64CC::CondCode(analyzeBranchCondCode[0].getImm()); in endsWithCondControlFlow()
226 MachineBasicBlock &SplitEdgeBB, AArch64CC::CondCode &CondCode, in insertTrackingCode() argument
235 .addImm(CondCode); in insertTrackingCode()
247 AArch64CC::CondCode CondCode; in instrumentControlFlow() local
249 if (!endsWithCondControlFlow(MBB, TBB, FBB, CondCode)) { in instrumentControlFlow()
256 AArch64CC::CondCode InvCondCode = AArch64CC::getInvertedCondCode(CondCode); in instrumentControlFlow()
268 insertTrackingCode(*SplitEdgeTBB, CondCode, DL); in instrumentControlFlow()
H A DAArch64ConditionOptimizer.cpp102 using CmpInfo = std::tuple<int, unsigned, AArch64CC::CondCode>;
112 CmpInfo adjustCmp(MachineInstr *CmpMI, AArch64CC::CondCode Cmp);
114 bool adjustTo(MachineInstr *CmpMI, AArch64CC::CondCode Cmp, MachineInstr *To,
230 static AArch64CC::CondCode getAdjustedCmp(AArch64CC::CondCode Cmp) { in getAdjustedCmp()
244 MachineInstr *CmpMI, AArch64CC::CondCode Cmp) { in adjustCmp()
275 AArch64CC::CondCode Cmp; in modifyCmp()
304 static bool parseCond(ArrayRef<MachineOperand> Cond, AArch64CC::CondCode &CC) { in parseCond()
308 CC = (AArch64CC::CondCode)(int)Cond[0].getImm(); in parseCond()
318 AArch64CC::CondCode Cmp, MachineInstr *To, int ToImm) in adjustTo()
375 AArch64CC::CondCode HeadCmp; in runOnMachineFunction()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/VE/
H A DVE.h42 enum CondCode { enum
85 inline static const char *VECondCodeToString(VECC::CondCode CC) { in VECondCodeToString()
114 inline static VECC::CondCode stringToVEICondCode(StringRef S) { in stringToVEICondCode()
115 return StringSwitch<VECC::CondCode>(S) in stringToVEICondCode()
128 inline static VECC::CondCode stringToVEFCondCode(StringRef S) { in stringToVEFCondCode()
129 return StringSwitch<VECC::CondCode>(S) in stringToVEFCondCode()
150 inline static unsigned VECondCodeToVal(VECC::CondCode CC) { in VECondCodeToVal()
201 inline static VECC::CondCode VEValToCondCode(unsigned Val, bool IsInteger) { in VEValToCondCode()
H A DVEISelDAGToDAG.cpp27 inline static VECC::CondCode intCondCode2Icc(ISD::CondCode CC) { in intCondCode2Icc()
55 inline static VECC::CondCode fpCondCode2Fcc(ISD::CondCode CC) { in fpCondCode2Fcc()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiCondCode.h10 enum CondCode { enum
34 inline static StringRef lanaiCondCodeToString(LPCC::CondCode CC) { in lanaiCondCodeToString()
73 inline static CondCode suffixToLanaiCondCode(StringRef S) { in suffixToLanaiCondCode()
74 return StringSwitch<CondCode>(S) in suffixToLanaiCondCode()
H A DLanaiInstrInfo.cpp123 static LPCC::CondCode getOppositeCondition(LPCC::CondCode CC) { in getOppositeCondition()
351 SmallVector<std::pair<MachineOperand *, LPCC::CondCode>, 4> in optimizeCompareInstr()
371 LPCC::CondCode CC; in optimizeCompareInstr()
372 CC = (LPCC::CondCode)Instr.getOperand(IO - 1).getImm(); in optimizeCompareInstr()
375 LPCC::CondCode NewCC = getOppositeCondition(CC); in optimizeCompareInstr()
522 unsigned CondCode = MI.getOperand(3).getImm(); in optimizeSelect() local
524 NewMI.addImm(getOppositeCondition(LPCC::CondCode(CondCode))); in optimizeSelect()
526 NewMI.addImm(CondCode); in optimizeSelect()
625 LPCC::CondCode BranchCond = in analyzeBranch()
651 LPCC::CondCode BranchCond = in reverseBranchCondition()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreInstrInfo.cpp37 enum CondCode { enum
133 static XCore::CondCode GetCondFromBranchOpc(unsigned BrOpc) in GetCondFromBranchOpc()
146 static inline unsigned GetCondBranchFromCond(XCore::CondCode CC) in GetCondBranchFromCond()
157 static inline XCore::CondCode GetOppositeBranchCondition(XCore::CondCode CC) in GetOppositeBranchCondition()
212 XCore::CondCode BranchCode = GetCondFromBranchOpc(LastInst->getOpcode()); in analyzeBranch()
233 XCore::CondCode BranchCode = GetCondFromBranchOpc(SecondLastOpc); in analyzeBranch()
289 unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[0].getImm()); in insertBranch()
298 unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[0].getImm()); in insertBranch()
406 Cond[0].setImm(GetOppositeBranchCondition((XCore::CondCode)Cond[0].getImm())); in reverseBranchCondition()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/MSP430/AsmParser/
H A DMSP430AsmParser.cpp334 unsigned CondCode; in parseJccInstruction() local
336 CondCode = MSP430CC::COND_NE; in parseJccInstruction()
338 CondCode = MSP430CC::COND_E; in parseJccInstruction()
340 CondCode = MSP430CC::COND_LO; in parseJccInstruction()
342 CondCode = MSP430CC::COND_HS; in parseJccInstruction()
344 CondCode = MSP430CC::COND_N; in parseJccInstruction()
346 CondCode = MSP430CC::COND_GE; in parseJccInstruction()
348 CondCode = MSP430CC::COND_L; in parseJccInstruction()
350 CondCode = MSP430CC::COND_NONE; in parseJccInstruction()
354 if (CondCode == (unsigned)MSP430CC::COND_NONE) in parseJccInstruction()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kInstrInfo.h34 enum CondCode { enum
58 static inline M68k::CondCode GetOppositeBranchCondition(M68k::CondCode CC) { in GetOppositeBranchCondition()
97 static inline unsigned GetCondBranchFromCond(M68k::CondCode CC) { in GetCondBranchFromCond()
132 static inline M68k::CondCode GetCondFromBranchOpc(unsigned Opcode) { in GetCondFromBranchOpc()
H A DM68kISelLowering.cpp1481 static M68k::CondCode TranslateIntegerM68kCC(ISD::CondCode SetCCOpcode) { in TranslateIntegerM68kCC()
1931 M68k::CondCode CCode = (M68k::CondCode)Op0.getConstantOperandVal(0); in LowerSETCC()
2040 unsigned CondCode = in LowerSELECT() local
2044 (CondCode == M68k::COND_EQ || CondCode == M68k::COND_NE)) { in LowerSELECT()
2183 if ((CondCode == M68k::COND_CC || CondCode == M68k::COND_CS) && in LowerSELECT()
2380 M68k::CondCode CCode = in LowerBRCOND()
2398 M68k::CondCode CCode = in LowerBRCOND()
2411 M68k::CondCode CCode = in LowerBRCOND()
2992 M68k::CondCode CC = M68k::CondCode(MI.getOperand(3).getImm()); in EmitLoweredSelect()
3290 M68k::CondCode CC = M68k::CondCode(N->getConstantOperandVal(0)); in combineM68kSetCC()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrInfo.h38 std::pair<CondCode, bool> getX86ConditionCode(CmpInst::Predicate Predicate);
47 CondCode getCondFromBranch(const MachineInstr &MI);
50 CondCode getCondFromSETCC(const MachineInstr &MI);
53 CondCode getCondFromCMov(const MachineInstr &MI);
57 CondCode GetOppositeBranchCondition(CondCode CC);
60 unsigned getVPCMPImmForCond(ISD::CondCode CC);
H A DX86FlagsCopyLowering.cpp102 const DebugLoc &TestLoc, X86::CondCode Cond);
105 const DebugLoc &TestLoc, X86::CondCode Cond, CondRegArray &CondRegs);
342 static X86::CondCode getCondFromFCMOV(unsigned Opcode) { in getCondFromFCMOV()
740 X86::CondCode Cond = X86::getCondFromSETCC(MI); in collectCondsInRegs()
758 const DebugLoc &TestLoc, X86::CondCode Cond) { in promoteCondToReg()
770 const DebugLoc &TestLoc, X86::CondCode Cond, CondRegArray &CondRegs) { in getCondOrInverseInReg()
798 X86::CondCode Cond = X86::COND_INVALID; in rewriteArithmetic()
853 X86::CondCode Cond = X86::getCondFromCMov(CMovI); in rewriteCMov()
879 X86::CondCode Cond = getCondFromFCMOV(CMovI.getOpcode()); in rewriteFCMov()
921 X86::CondCode Cond = X86::getCondFromBranch(JmpI); in rewriteCondJmp()
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H A DX86CmovConversion.cpp283 X86::CondCode FirstCC = X86::COND_INVALID, FirstOppCC = X86::COND_INVALID, in collectCmovCandidates()
294 X86::CondCode CC = X86::getCondFromCMov(I); in collectCmovCandidates()
656 X86::CondCode CC = X86::CondCode(X86::getCondFromCMov(MI)); in convertCmovInstsToBranches()
657 X86::CondCode OppCC = X86::GetOppositeBranchCondition(CC); in convertCmovInstsToBranches()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARC/MCTargetDesc/
H A DARCInstPrinter.cpp54 static const char *ARCCondCodeToString(ARCCC::CondCode CC) { in ARCCondCodeToString()
172 O << ARCCondCodeToString((ARCCC::CondCode)Op.getImm()); in printPredicateOperand()
184 O << ARCCondCodeToString((ARCCC::CondCode)MI->getOperand(OpNum).getImm()); in printCCOperand()
H A DARCInfo.h24 enum CondCode { enum
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Lanai/MCTargetDesc/
H A DLanaiInstPrinter.cpp290 LPCC::CondCode CC = in printCCOperand()
291 static_cast<LPCC::CondCode>(MI->getOperand(OpNo).getImm()); in printCCOperand()
301 LPCC::CondCode CC = in printPredicateOperand()
302 static_cast<LPCC::CondCode>(MI->getOperand(OpNo).getImm()); in printPredicateOperand()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsInstPrinter.h32 enum CondCode { enum
72 const char *MipsFCCToString(Mips::CondCode CC);
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/Utils/
H A DAArch64BaseInfo.h254 enum CondCode { // Meaning (integer) Meaning (floating-point) enum
281 inline static const char *getCondCodeName(CondCode Code) { in getCondCodeName()
303 inline static CondCode getInvertedCondCode(CondCode Code) { in getInvertedCondCode()
306 return static_cast<CondCode>(static_cast<unsigned>(Code) ^ 0x1); in getInvertedCondCode()
313 inline static unsigned getNZCVToSatisfyCondCode(CondCode Code) { in getNZCVToSatisfyCondCode()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Lanai/AsmParser/
H A DLanaiAsmParser.cpp1077 LPCC::CondCode CondCode = in splitMnemonic() local
1079 if (CondCode != LPCC::UNKNOWN) { in splitMnemonic()
1083 MCConstantExpr::create(CondCode, getContext()), NameLoc, NameLoc)); in splitMnemonic()
1097 LPCC::CondCode CondCode = LPCC::suffixToLanaiCondCode(Mnemonic); in splitMnemonic() local
1098 if (CondCode != LPCC::UNKNOWN) { in splitMnemonic()
1112 MCConstantExpr::create(CondCode, getContext()), NameLoc, NameLoc)); in splitMnemonic()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCInstrInfo.cpp102 static ARCCC::CondCode GetOppositeBranchCondition(ARCCC::CondCode CC) { in GetOppositeBranchCondition()
353 Cond[2].setImm(GetOppositeBranchCondition((ARCCC::CondCode)Cond[2].getImm())); in reverseBranchCondition()

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