| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 4386 MVT CmpVT = N0.getSimpleValueType(); in tryVPTESTM() local 4387 MVT CmpSVT = CmpVT.getVectorElementType(); in tryVPTESTM() 4465 unsigned Scale = CmpVT.is128BitVector() ? 4 : 2; in tryVPTESTM() 4468 CmpVT = MVT::getVectorVT(CmpSVT, NumElts); in tryVPTESTM() 5351 MVT CmpVT = N0.getSimpleValueType(); in Select() local 5360 switch (CmpVT.SimpleTy) { in Select() 5418 MVT CmpVT = N0.getSimpleValueType(); in Select() local 5456 if (CmpVT == MVT::i64 && !isInt<32>(Mask) && in Select() 5492 (!(Mask & 0x80) || CmpVT == MVT::i8 || in Select() 5500 (!(Mask & 0x8000) || CmpVT == MVT::i16 || in Select() [all …]
|
| H A D | X86FastISel.cpp | 2081 EVT CmpVT = TLI.getValueType(DL, CmpLHS->getType()); in X86FastEmitCMoveSelect() local 2083 if (!X86FastEmitCompare(CmpLHS, CmpRHS, CmpVT, CI->getDebugLoc())) in X86FastEmitCMoveSelect() 2314 EVT CmpVT = TLI.getValueType(DL, CmpLHS->getType()); in X86FastEmitPseudoSelect() local 2315 if (!X86FastEmitCompare(CmpLHS, CmpRHS, CmpVT, CI->getDebugLoc())) in X86FastEmitPseudoSelect()
|
| H A D | X86ISelLowering.cpp | 22532 assert((CmpVT == MVT::i8 || CmpVT == MVT::i16 || in EmitCmp() 22533 CmpVT == MVT::i32 || CmpVT == MVT::i64) && "Unexpected VT!"); in EmitCmp() 22564 CmpVT = MVT::i32; in EmitCmp() 22576 CmpVT = MVT::i32; in EmitCmp() 40392 if (EVT(CmpVT) == VT) in combineBitcast() 48532 if (VecVT != CmpVT) in emitOrXorXorTree() 48540 if (VecVT != CmpVT) in emitOrXorXorTree() 48611 CmpVT = MVT::v64i1; in combineVectorSizedSetCCEquality() 48616 CmpVT = MVT::v16i1; in combineVectorSizedSetCCEquality() 48659 if (VecVT != CmpVT) { in combineVectorSizedSetCCEquality() [all …]
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 10900 CmpVT = MVT::v4i32; in LowerVSETCC() 10926 Cmp = DAG.getNode(ISD::OR, dl, CmpVT, Cmp, Cmp2); in LowerVSETCC() 13800 EVT CmpVT = InfoAndKind.IsAArch64 in performSetccAddFolding() local 13803 if (CmpVT != MVT::i32 && CmpVT != MVT::i64) in performSetccAddFolding() 14150 EVT CmpVT = N->getOperand(2).getValueType(); in tryConvertSVEWideCompare() local 15939 EVT CmpVT = N0.getOperand(0).getValueType(); in performVSelectCombine() local 15942 if (ResVT.getSizeInBits() != CmpVT.getSizeInBits()) in performVSelectCombine() 17963 EVT CmpVT = Pg.getValueType(); in convertFixedMaskToScalableVector() local 17964 return DAG.getNode(AArch64ISD::SETCC_MERGE_ZERO, DL, CmpVT, in convertFixedMaskToScalableVector() 18431 EVT CmpVT = Pg.getValueType(); in LowerFixedLengthVectorSetccToSVE() local [all …]
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 6592 EVT CmpVT; in LowerVSETCC() local 6594 CmpVT = Op0.getValueType().changeVectorElementTypeToInteger(); in LowerVSETCC() 6607 CmpVT = VT; in LowerVSETCC() 6614 unsigned CmpElements = CmpVT.getVectorNumElements() * 2; in LowerVSETCC() 6622 Merged = DAG.getNode(ISD::BITCAST, dl, CmpVT, Merged); in LowerVSETCC() 6624 Merged = DAG.getNOT(dl, Merged, CmpVT); in LowerVSETCC() 6629 if (CmpVT.getVectorElementType() == MVT::i64) in LowerVSETCC() 6660 SDValue TmpOp0 = DAG.getNode(ARMISD::VCMP, dl, CmpVT, Op1, Op0, in LowerVSETCC() 6662 SDValue TmpOp1 = DAG.getNode(ARMISD::VCMP, dl, CmpVT, Op0, Op1, in LowerVSETCC() 6744 Result = DAG.getNode(ARMISD::VCMPZ, dl, CmpVT, SingleOp, in LowerVSETCC() [all …]
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 7835 EVT CmpVT = Op.getOperand(0).getValueType(); in LowerSELECT_CC() local 7843 if (!Subtarget.hasP9Vector() && CmpVT == MVT::f128) { in LowerSELECT_CC() 7845 dl, getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), CmpVT), in LowerSELECT_CC() 7852 if (!CmpVT.isFloatingPoint() || !TV.getValueType().isFloatingPoint() || in LowerSELECT_CC() 7926 Cmp = DAG.getNode(ISD::FSUB, dl, CmpVT, LHS, RHS, Flags); in LowerSELECT_CC() 7936 Cmp = DAG.getNode(ISD::FSUB, dl, CmpVT, LHS, RHS, Flags); in LowerSELECT_CC() 7942 Cmp = DAG.getNode(ISD::FSUB, dl, CmpVT, LHS, RHS, Flags); in LowerSELECT_CC() 7948 Cmp = DAG.getNode(ISD::FSUB, dl, CmpVT, RHS, LHS, Flags); in LowerSELECT_CC() 7954 Cmp = DAG.getNode(ISD::FSUB, dl, CmpVT, RHS, LHS, Flags); in LowerSELECT_CC()
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 4758 EVT CmpVT = LHS.getValueType(); in lowerICMPIntrinsic() local 4759 if (CmpVT == MVT::i16 && !TLI.isTypeLegal(MVT::i16)) { in lowerICMPIntrinsic() 4789 EVT CmpVT = Src0.getValueType(); in lowerFCMPIntrinsic() local 4792 if (CmpVT == MVT::f16 && !TLI.isTypeLegal(CmpVT)) { in lowerFCMPIntrinsic()
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 3630 EVT CmpVT = Tmp1.getValueType(); in ExpandNode() local 3634 EVT CCVT = getSetCCResultType(CmpVT); in ExpandNode()
|
| H A D | SelectionDAGBuilder.cpp | 7707 EVT CmpVT = EVT::getIntegerVT(LHS->getContext(), LoadVT.getSizeInBits()); in visitMemCmpBCmpCall() local 7708 LoadL = DAG.getBitcast(CmpVT, LoadL); in visitMemCmpBCmpCall() 7709 LoadR = DAG.getBitcast(CmpVT, LoadR); in visitMemCmpBCmpCall()
|