Searched refs:CastVT (Results 1 – 5 of 5) sorted by relevance
| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeFloatTypes.cpp | 2539 EVT CastVT = CastVal.getValueType(); in BitcastToInt_ATOMIC_SWAP() local
2542 = DAG.getAtomic(ISD::ATOMIC_SWAP, SL, CastVT, in BitcastToInt_ATOMIC_SWAP()
2543 DAG.getVTList(CastVT, MVT::Other), in BitcastToInt_ATOMIC_SWAP()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 3429 EVT CastVT = getPromotedVTForPredicate(InVT); in LowerVectorINT_TO_FP() local
3430 In = DAG.getNode(CastOpc, dl, CastVT, In); in LowerVectorINT_TO_FP()
3445 MVT CastVT = in LowerVectorINT_TO_FP() local
3448 In = DAG.getNode(Opc, dl, CastVT, In); in LowerVectorINT_TO_FP()
3454 EVT CastVT = VT.changeVectorElementTypeToInteger(); in LowerVectorINT_TO_FP() local
3455 In = DAG.getNode(CastOpc, dl, CastVT, In); in LowerVectorINT_TO_FP()
9094 V0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, CastVT, V0, in tryFormConcatFromShuffle()
9098 V1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, CastVT, V1, in tryFormConcatFromShuffle()
9317 MVT CastVT; in constructDup() local
9318 if (getScaledOffsetDup(V, Lane, CastVT)) { in constructDup()
[all …]
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 18671 Cond = DAG.getBitcast(CastVT, Cond); in LowerVSELECT()
18672 LHS = DAG.getBitcast(CastVT, LHS); in LowerVSELECT()
18673 RHS = DAG.getBitcast(CastVT, RHS); in LowerVSELECT()
23158 Cmp = DAG.getBitcast(CastVT, Cmp); in LowerVSETCC()
24443 MVT CastVT = MVT::getVectorVT(StVT, 2); in LowerStore() local
45942 EVT CastVT = VT; in reduceMaskedLoadToScalarLoad() local
46079 Value = DAG.getBitcast(CastVT, Value); in reduceMaskedStoreToScalarStore()
48606 EVT CastVT = VecVT; in combineVectorSizedSetCCEquality() local
48613 CastVT = VecVT; in combineVectorSizedSetCCEquality()
48617 CastVT = OpSize == 512 ? VecVT : in combineVectorSizedSetCCEquality()
[all …]
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| H A D | X86InstrAVX512.td | 1789 X86VectorVTInfo CastVT> {
1793 (CastVT.VT _.RC:$src1))),
1795 (_.VT (bitconvert (CastVT.VT _.RC:$src1))))),
1801 (CastVT.VT _.RC:$src1))),
1803 (_.VT (bitconvert (CastVT.VT _.RC:$src1))))),
1808 (IdxVT.VT (bitconvert (CastVT.VT _.RC:$src1))),
1810 (_.VT (bitconvert (CastVT.VT _.RC:$src1))))),
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 4734 EVT CastVT = getEquivalentMemType(*DAG.getContext(), LoadVT); in lowerIntrinsicLoad() local
4735 SDVTList VTList = DAG.getVTList(CastVT, MVT::Other); in lowerIntrinsicLoad()
4736 SDValue MemNode = getMemIntrinsicNode(Opc, DL, VTList, Ops, CastVT, in lowerIntrinsicLoad()
5874 static SDValue padEltsToUndef(SelectionDAG &DAG, const SDLoc &DL, EVT CastVT, in padEltsToUndef() argument
5889 return DAG.getBuildVector(CastVT, DL, Elts); in padEltsToUndef()
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