Home
last modified time | relevance | path

Searched refs:CarryRC (Results 1 – 4 of 4) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSILoadStoreOptimizer.cpp1694 const auto *CarryRC = TRI->getRegClass(AMDGPU::SReg_1_XEXECRegClassID); in computeBase() local
1695 Register CarryReg = MRI->createVirtualRegister(CarryRC); in computeBase()
1696 Register DeadCarryReg = MRI->createVirtualRegister(CarryRC); in computeBase()
H A DSIInstrInfo.cpp5959 const auto *CarryRC = RI.getRegClass(AMDGPU::SReg_1_XEXECRegClassID); in moveToVALU() local
5962 if (!MRI.constrainRegClass(CarryInReg, CarryRC)) { in moveToVALU()
5963 Register NewCarryReg = MRI.createVirtualRegister(CarryRC); in moveToVALU()
6456 const auto *CarryRC = RI.getRegClass(AMDGPU::SReg_1_XEXECRegClassID); in splitScalar64BitAddSub() local
6462 Register CarryReg = MRI.createVirtualRegister(CarryRC); in splitScalar64BitAddSub()
6463 Register DeadCarryReg = MRI.createVirtualRegister(CarryRC); in splitScalar64BitAddSub()
H A DAMDGPUInstructionSelector.cpp369 const TargetRegisterClass *CarryRC = TRI.getWaveMaskRegClass(); in selectG_ADD_SUB() local
370 Register CarryReg = MRI->createVirtualRegister(CarryRC); in selectG_ADD_SUB()
377 .addDef(MRI->createVirtualRegister(CarryRC), RegState::Dead) in selectG_ADD_SUB()
H A DSIISelLowering.cpp3996 const auto *CarryRC = TRI->getRegClass(AMDGPU::SReg_1_XEXECRegClassID); in EmitInstrWithCustomInserter() local
4001 Register CarryReg = MRI.createVirtualRegister(CarryRC); in EmitInstrWithCustomInserter()
4002 Register DeadCarryReg = MRI.createVirtualRegister(CarryRC); in EmitInstrWithCustomInserter()