Searched refs:COMBINE (Results 1 – 7 of 7) sorted by relevance
| /freebsd-13.1/sys/libkern/ |
| H A D | qdivrem.c | 151 rbj = COMBINE(u[1] % t, u[2]); in __qdivrem() 153 rbj = COMBINE(rbj % t, u[3]); in __qdivrem() 155 rbj = COMBINE(rbj % t, u[4]); in __qdivrem() 159 tmp.ul[H] = COMBINE(q1, q2); in __qdivrem() 160 tmp.ul[L] = COMBINE(q3, q4); in __qdivrem() 214 u_long nn = COMBINE(uj0, uj1); in __qdivrem() 218 while (v2 * qhat > COMBINE(rhat, uj2)) { in __qdivrem() 267 tmp.ul[H] = COMBINE(uspace[1], uspace[2]); in __qdivrem() 268 tmp.ul[L] = COMBINE(uspace[3], uspace[4]); in __qdivrem() 272 tmp.ul[H] = COMBINE(qspace[1], qspace[2]); in __qdivrem() [all …]
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| /freebsd-13.1/lib/libc/quad/ |
| H A D | qdivrem.c | 154 rbj = COMBINE(u[1] % t, u[2]); in __qdivrem() 156 rbj = COMBINE(rbj % t, u[3]); in __qdivrem() 158 rbj = COMBINE(rbj % t, u[4]); in __qdivrem() 162 tmp.ul[H] = COMBINE(q1, q2); in __qdivrem() 163 tmp.ul[L] = COMBINE(q3, q4); in __qdivrem() 217 u_long n = COMBINE(uj0, uj1); in __qdivrem() 221 while (v2 * qhat > COMBINE(rhat, uj2)) { in __qdivrem() 270 tmp.ul[H] = COMBINE(uspace[1], uspace[2]); in __qdivrem() 271 tmp.ul[L] = COMBINE(uspace[3], uspace[4]); in __qdivrem() 275 tmp.ul[H] = COMBINE(qspace[1], qspace[2]); in __qdivrem() [all …]
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1877 case HexagonISD::COMBINE: return "HexagonISD::COMBINE"; in getTargetNodeName() 2247 SDValue Concat10 = DAG.getNode(HexagonISD::COMBINE, dl, in LowerVECTOR_SHUFFLE() 2254 SDValue Concat01 = DAG.getNode(HexagonISD::COMBINE, dl, in LowerVECTOR_SHUFFLE() 2533 return DAG.getNode(HexagonISD::COMBINE, dl, VecTy, {H, L}); in buildVector64() 2650 ValR = DAG.getNode(HexagonISD::COMBINE, dl, MVT::i64, in insertVector() 2820 return DAG.getNode(HexagonISD::COMBINE, dl, VecTy, Op.getOperand(1), in LowerCONCAT_VECTORS() 2844 W = DAG.getNode(HexagonISD::COMBINE, dl, MVT::i64, in LowerCONCAT_VECTORS() 2870 SDValue WW = DAG.getNode(HexagonISD::COMBINE, dl, MVT::i64, in LowerCONCAT_VECTORS()
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| H A D | HexagonISelLowering.h | 55 COMBINE, enumerator
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| H A D | HexagonISelLoweringHVX.cpp | 950 SDValue WW = DAG.getNode(HexagonISD::COMBINE, dl, MVT::i64, {W1, W0}); in extractHvxSubvectorReg() 1013 SDValue Vec64 = DAG.getNode(HexagonISD::COMBINE, dl, MVT::v8i8, {W1, W0}); in extractHvxSubvectorPred() 1629 HexagonISD::COMBINE, dl, MVT::i64, {Words[i+1], Words[i]}); in LowerHvxBitcast()
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| H A D | HexagonPatterns.td | 1046 def HexagonCOMBINE: SDNode<"HexagonISD::COMBINE", SDTHexagonI64I32I32>;
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| /freebsd-13.1/contrib/llvm-project/clang/include/clang/Basic/ |
| H A D | arm_neon.td | 995 def COMBINE : NoTestOpInst<"vcombine", "Q..", "dPl", OP_CONC>;
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