| /freebsd-13.1/sys/contrib/device-tree/Bindings/clock/ |
| H A D | mvebu-core-clock.txt | 8 0 = tclk (Internal Bus clock)
15 0 = tclk (Internal Bus clock)
21 0 = tclk (Internal Bus clock)
27 0 = tclk (Internal Bus clock)
35 0 = tclk (Internal Bus clock)
41 0 = tclk (Internal Bus clock)
47 0 = tclk (Internal Bus clock)
|
| H A D | allwinner,sun9i-a80-de-clks.yaml | 28 - description: Bus Clock
29 - description: RAM Bus Clock
|
| /freebsd-13.1/sys/contrib/device-tree/Bindings/spi/ |
| H A D | spi-nxp-fspi.txt | 18 - <0>: Bus A, CS 0
19 - <1>: Bus A, CS 1
20 - <2>: Bus B, CS 0
21 - <3>: Bus B, CS 1
|
| H A D | spi-fsl-qspi.txt | 19 <0>: Bus A, CS 0
20 <1>: Bus A, CS 1
21 <2>: Bus B, CS 0
22 <3>: Bus B, CS 1
|
| /freebsd-13.1/sys/contrib/device-tree/Bindings/memory-controllers/ |
| H A D | renesas,dbsc.yaml | 7 title: Renesas DDR Bus Controllers
15 different names, e.g. "DDR Bus Controller (DBSC)", "DDR3 Bus State Controller
16 (DBSC3)", or "SDRAM Bus State Controller (SBSC)").
|
| H A D | mvebu-devbus.txt | 1 Device tree bindings for MVEBU Device Bus controllers
3 The Device Bus controller available in some Marvell's SoC allows to control
5 The actual devices are instantiated from the child nodes of a Device Bus node.
39 This prevents contentions on the Device Bus after a read
110 is showed below. Note that the Device Bus driver is in charge of allocating
137 /* Device Bus parameters are required */
|
| /freebsd-13.1/sys/contrib/dev/acpica/components/hardware/ |
| H A D | hwpci.c | 389 PciId->Segment, PciId->Bus, PciId->Device, PciId->Function)); in AcpiHwProcessPciList()
391 BusNumber = PciId->Bus; in AcpiHwProcessPciList()
416 PciId->Segment, PciId->Bus, PciId->Device, PciId->Function, in AcpiHwProcessPciList()
522 PciId->Bus = *BusNumber; in AcpiHwGetPciDeviceInfo()
558 PciId->Bus = (UINT16) PciValue; in AcpiHwGetPciDeviceInfo()
|
| /freebsd-13.1/sys/contrib/device-tree/Bindings/mfd/ |
| H A D | atmel-matrix.txt | 1 * Device tree bindings for Atmel Bus Matrix
3 The Bus Matrix registers are used to configure Atmel SoCs internal bus
17 - reg: Contains offset/length value of the Bus Matrix
|
| /freebsd-13.1/sys/contrib/device-tree/Bindings/bus/ |
| H A D | renesas,bsc.yaml | 6 title: Renesas Bus State Controller (BSC)
12 The Renesas Bus State Controller (BSC, sometimes called "LBSC within Bus
13 Bridge", or "External Bus Interface") can be found in several Renesas ARM
|
| H A D | socionext,uniphier-system-bus.yaml | 7 title: UniPhier System Bus
10 The UniPhier System Bus is an external bus that connects on-board devices to
41 Provide address translation from the System Bus to the parent bus.
44 The address region(s) that can be assigned for the System Bus is
|
| H A D | simple-pm-bus.yaml | 7 title: Simple Power-Managed Bus
13 A Simple Power-Managed Bus is a transparent bus that doesn't need a real
|
| /freebsd-13.1/sys/contrib/device-tree/src/powerpc/ |
| H A D | motionpro.dts | 94 // 8-bit DualPort SRAM on LocalPlus Bus CS1
101 // 8-bit board CPLD on LocalPlus Bus CS2
107 // 8-bit custom Anybus Module on LocalPlus Bus CS3
121 // 16-bit flash device at LocalPlus Bus CS0
|
| /freebsd-13.1/sys/dev/mpt/mpilib/ |
| H A D | mpi_init.h | 107 U8 Bus; /* 01h */ member
177 U8 Bus; /* 01h */ member
273 U8 Bus; /* 01h */ member
432 U8 Bus; /* 01h */ member
470 U8 Bus; /* 01h */ member
501 U8 Bus; /* 01h */ member
553 U8 Bus; /* 01h */ member
|
| H A D | mpi_sas.h | 180 U8 Bus; /* 01h */ member
216 U8 Bus; /* 01h */ member
248 U8 Bus; /* 0Dh */ member
|
| /freebsd-13.1/sys/dev/smartpqi/ |
| H A D | smartpqi_ioctl.h | 54 BYTE Bus:6; member
64 BYTE Bus:3; member
73 DWORD Bus:6; member
|
| /freebsd-13.1/sys/dev/ciss/ |
| H A D | cissio.h | 111 u_int8_t Bus:6; member
121 u_int8_t Bus:3; member
129 u_int32_t Bus:6; member
|
| /freebsd-13.1/sys/dev/acpica/Osd/ |
| H A D | OsdHardware.c | 115 *(UINT64 *)Value = pci_cfgregread(PciId->Bus, PciId->Device, in AcpiOsReadPciConfiguration()
137 pci_cfgregwrite(PciId->Bus, PciId->Device, PciId->Function, Register, in AcpiOsWritePciConfiguration()
|
| /freebsd-13.1/sys/contrib/device-tree/Bindings/ata/ |
| H A D | cavium-compact-flash.txt | 3 The Cavium Compact Flash device is connected to the Octeon Boot Bus,
4 and is thus a child of the Boot Bus device. It can read and write
|
| /freebsd-13.1/sys/contrib/device-tree/Bindings/interconnect/ |
| H A D | qcom,msm8974.yaml | 39 - description: Bus Clock
40 - description: Bus A Clock
|
| H A D | qcom,qcs404.yaml | 36 - description: Bus Clock
37 - description: Bus A Clock
|
| H A D | qcom,msm8916.yaml | 36 - description: Bus Clock
37 - description: Bus A Clock
|
| /freebsd-13.1/sys/contrib/device-tree/Bindings/mips/cavium/ |
| H A D | bootbus.txt | 1 * Boot Bus
3 The Octeon Boot Bus is a configurable parallel bus with 8 chip
11 - reg: The base address of the Boot Bus' register bank.
|
| /freebsd-13.1/sys/contrib/device-tree/Bindings/rtc/ |
| H A D | trivial-rtc.yaml | 45 # Real Time Clock Module with I2C-Bus
47 # Real Time Clock Module with I2C-Bus
|
| /freebsd-13.1/sys/contrib/device-tree/Bindings/soc/fsl/cpm_qe/cpm/ |
| H A D | usb.txt | 1 * USB (Universal Serial Bus Controller)
|
| /freebsd-13.1/sys/contrib/dev/acpica/include/ |
| H A D | actbl1.h | 754 UINT8 Bus; member
1486 UINT32 Bus; /* Bus and Segment numbers */ member
1509 #define ACPI_HEST_BUS(Bus) ((Bus) & 0xFF) argument
1510 #define ACPI_HEST_SEGMENT(Bus) (((Bus) >> 8) & 0xFFFF) argument
|