Searched refs:BasePtrReg (Results 1 – 3 of 3) sorted by relevance
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIFrameLowering.cpp | 751 Register BasePtrReg = in emitPrologue() local 836 .addReg(BasePtrReg); in emitPrologue() 871 .addReg(BasePtrReg) in emitPrologue() 888 .addReg(BasePtrReg) in emitPrologue() 946 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::COPY), BasePtrReg) in emitPrologue() 996 const Register BasePtrReg = in emitEpilogue() local 1016 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::COPY), BasePtrReg) in emitEpilogue() 1059 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::V_READFIRSTLANE_B32), BasePtrReg) in emitEpilogue() 1067 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::V_READLANE_B32), BasePtrReg) in emitEpilogue() 1328 Register BasePtrReg = RI->getBaseRegister(); in assignCalleeSavedSpillSlots() local [all …]
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| H A D | SIRegisterInfo.cpp | 566 MCRegister BasePtrReg = getBaseRegister(); in getReservedRegs() local 567 reserveRegisterTuples(Reserved, BasePtrReg); in getReservedRegs() 568 assert(!isSubRegister(ScratchRSrcReg, BasePtrReg)); in getReservedRegs()
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| H A D | AMDGPURegisterBankInfo.cpp | 1223 Register BasePtrReg = SrcRegs[0]; in applyMappingLoad() local 1225 MRI.setType(BasePtrReg, PtrTy); in applyMappingLoad()
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