| /freebsd-13.1/usr.sbin/bhyve/ |
| H A D | bhyverun.c | 193 static const int BSP = 0; variable
553 assert(fromcpu == BSP); in fbsdrun_addcpu()
884 if (*pvcpu != BSP) { in vmexit_suspend()
1029 if (cpu == BSP) in fbsdrun_set_capabilities()
1044 if (cpu == BSP) in fbsdrun_set_capabilities()
1149 fbsdrun_addcpu(ctx, BSP, vcpu, rip); in spinup_vcpu()
1404 fbsdrun_set_capabilities(ctx, BSP); in main()
1461 error = vcpu_reset(ctx, BSP); in main()
1499 error = vm_get_register(ctx, BSP, VM_REG_GUEST_RIP, &rip); in main()
1556 fbsdrun_addcpu(ctx, BSP, BSP, rip); in main()
[all …]
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| /freebsd-13.1/usr.sbin/bhyveload/ |
| H A D | bhyveload.c | 92 #define BSP 0 macro
413 error = vm_set_register(ctx, BSP, vmreg, v); in cb_setreg()
441 error = vm_set_register(ctx, BSP, vmreg, v); in cb_setmsr()
476 error = vm_set_register(ctx, BSP, vmreg, v); in cb_setcr()
488 error = vm_set_desc(ctx, BSP, VM_REG_GUEST_GDTR, base, size - 1, 0); in cb_setgdt()
503 error = vm_setup_freebsd_registers_i386(ctx, BSP, rip, gdtbase, in cb_exec()
506 error = vm_setup_freebsd_registers(ctx, BSP, rip, cr3, gdtbase, in cb_exec()
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| /freebsd-13.1/sys/contrib/device-tree/src/powerpc/ |
| H A D | mpc5125twr.dts | 16 model = "mpc5125twr"; // In BSP "mpc5125ads"
287 compatible = "fsl,mpc5121-dma"; // BSP name: "mpc512x-dma2"
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| /freebsd-13.1/sys/powerpc/powerpc/ |
| H A D | platform_if.m | 255 * Entered (approximately) simultaneously on all CPUs, including the BSP.
256 * Passed the timebase value on the BSP as of shortly before the call.
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| /freebsd-13.1/sys/contrib/device-tree/src/arm64/rockchip/ |
| H A D | rk3399pro-vmarc-som.dtsi | 199 * As per BSP, but schematic not showing any regulator
247 * As per BSP, but schematic not showing any regulator
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| /freebsd-13.1/sys/mips/conf/ |
| H A D | DIR-825C1.hints | 76 # XXX OpenWRT DB120 BSP doesn't have media/duplex set?
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| H A D | DB120.hints | 51 # XXX OpenWRT DB120 BSP doesn't have media/duplex set?
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| H A D | TL-WDR4300.hints | 82 # XXX OpenWRT DB120 BSP doesn't have media/duplex set?
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| /freebsd-13.1/sys/contrib/device-tree/Bindings/arm/bcm/ |
| H A D | brcm,brcmstb.txt | 78 A phandle / integer array property which lets the BSP know the location
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| /freebsd-13.1/contrib/file/magic/Magdir/ |
| H A D | games | 19 >4 long 0x26 II Map file (BSP)
20 >4 long 0x2E III Map file (BSP)
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.h | 173 BSP, enumerator
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| H A D | AArch64SchedFalkorDetails.td | 914 def : InstRW<[FalkorWr_1VXVY_1cyc], (instregex "^(BIF|BIT|BSL|BSP)v8i8$")>;
938 def : InstRW<[FalkorWr_2VXVY_1cyc], (instregex "^(BIF|BIT|BSL|BSP)v16i8$")>;
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| H A D | AArch64SchedCyclone.td | 499 // BIF,BIT,BSL,BSP
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| H A D | AArch64SchedExynosM3.td | 665 def : InstRW<[M3WriteNALU1], (instregex "^(BIF|BIT|BSL|BSP)v")>;
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| H A D | AArch64SchedA57.td | 524 def : InstRW<[A57Write_3cyc_2V], (instregex "^(BIF|BIT|BSL|BSP)v16i8")>;
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| H A D | AArch64SchedExynosM5.td | 846 def : InstRW<[M5WriteNALU2], (instregex "^(BIF|BIT|BSL|BSP)v")>;
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| H A D | AArch64SchedExynosM4.td | 808 def : InstRW<[M4WriteNALU1], (instregex "^(BIF|BIT|BSL|BSP)v")>;
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| H A D | AArch64InstrInfo.td | 514 def AArch64bsp: SDNode<"AArch64ISD::BSP", SDT_AArch64trivec>;
4379 // Pseudo bitwise select pattern BSP.
4381 defm BSP : SIMDLogicalThreeVectorPseudo<TriOpFrag<(or (and node:$LHS, node:$MHS),
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| H A D | AArch64ISelLowering.cpp | 1970 MAKE_CASE(AArch64ISD::BSP) in getTargetNodeName()
13071 return DAG.getNode(AArch64ISD::BSP, DL, VT, Sub, SubSibling, AddSibling); in tryCombineToBSL()
13099 return DAG.getNode(AArch64ISD::BSP, DL, VT, SDValue(BVN0, 0), in tryCombineToBSL()
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