| /freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 62 AssertZext, enumerator
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonPatterns.td | 763 def AssertZextSD: SDNode<"ISD::AssertZext", SDTAssertZext>;
764 class AssertZext<ValueType T>: PatFrag<(ops node:$A), (AssertZextSD $A, T)>;
791 defm: Cmpb_pat <A4_cmpbeqi, seteq, AssertZext<i8>, IsUGT<8,31>, 255>;
792 defm: CmpbN_pat <A4_cmpbeqi, setne, AssertZext<i8>, IsUGT<8,31>, 255>;
793 defm: Cmpb_pat <A4_cmpbgtui, setugt, AssertZext<i8>, IsUGT<32,31>, 255>;
794 defm: CmpbN_pat <A4_cmpbgtui, setule, AssertZext<i8>, IsUGT<32,31>, 255>;
795 defm: Cmpb_pat <A4_cmphgtui, setugt, AssertZext<i16>, IsUGT<32,31>, 65535>;
796 defm: CmpbN_pat <A4_cmphgtui, setule, AssertZext<i16>, IsUGT<32,31>, 65535>;
797 defm: CmpbND_pat<A4_cmpbgtui, setult, AssertZext<i8>, IsUGT<32,32>, 255>;
798 defm: CmpbND_pat<A4_cmphgtui, setult, AssertZext<i16>, IsUGT<32,32>, 65535>;
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| H A D | HexagonISelDAGToDAG.cpp | 1529 case ISD::AssertZext: in keepsLowBits()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 108 case ISD::AssertZext: return "AssertZext"; in getOperationName()
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| H A D | LegalizeIntegerTypes.cpp | 58 case ISD::AssertZext: Res = PromoteIntRes_AssertZext(N); break; in PromoteIntegerResult()
259 return DAG.getNode(ISD::AssertZext, SDLoc(N), in PromoteIntRes_AssertZext()
627 ISD::AssertZext : ISD::AssertSext, dl, NVT, Res, in PromoteIntRes_FP_TO_XINT()
2105 case ISD::AssertZext: ExpandIntRes_AssertZext(N, Lo, Hi); break; in ExpandIntegerResult()
2914 Hi = DAG.getNode(ISD::AssertZext, dl, NVT, Hi, in ExpandIntRes_AssertZext()
2918 Lo = DAG.getNode(ISD::AssertZext, dl, NVT, Lo, DAG.getValueType(EVT)); in ExpandIntRes_AssertZext()
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| H A D | LegalizeVectorOps.cpp | 710 NewOpc = ISD::AssertZext; in PromoteFP_TO_INT()
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| H A D | SelectionDAGBuilder.cpp | 880 Parts[i] = DAG.getNode(isSExt ? ISD::AssertSext : ISD::AssertZext, dl, in getCopyFromRegs()
5478 case ISD::AssertZext: in getUnderlyingArgRegs()
9015 SDValue ZExt = DAG.getNode(ISD::AssertZext, SL, Op.getValueType(), Op, in lowerRangeToAssertZExt()
9770 AssertOp = ISD::AssertZext; in LowerCallTo()
10321 AssertOp = ISD::AssertZext; in LowerArguments()
10361 if (Res.getOpcode() == ISD::AssertZext) in LowerArguments()
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| H A D | LegalizeDAG.cpp | 766 Result = DAG.getNode(ISD::AssertZext, dl, in LegalizeLoadOps()
2782 LHS = DAG.getNode(ISD::AssertZext, dl, OuterType, Res, in ExpandNode()
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| H A D | SelectionDAGISel.cpp | 2872 case ISD::AssertZext: in SelectCodeCommon()
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| H A D | SelectionDAG.cpp | 3296 case ISD::AssertZext: { in computeKnownBits()
3697 case ISD::AssertZext: in ComputeNumSignBits()
5726 case ISD::AssertZext: { in getNode()
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| H A D | DAGCombiner.cpp | 1230 case ISD::AssertZext: in PromoteOperand()
1232 return DAG.getNode(ISD::AssertZext, DL, PVT, Op0, Op.getOperand(1)); in PromoteOperand()
1675 case ISD::AssertZext: return visitAssertExt(N); in visit()
5389 case ISD::AssertZext: { in SearchForAndLoads()
5392 EVT VT = Op.getOpcode() == ISD::AssertZext ? in SearchForAndLoads()
11736 Opcode == ISD::AssertZext) { in visitAssertExt()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFISelLowering.cpp | 343 ArgValue = DAG.getNode(ISD::AssertZext, DL, RegVT, ArgValue, in LowerFormalArguments()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.h | 460 Opc != ISD::AssertZext && Opc != ISD::AssertAlign && in isDef32()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 434 Arg = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Arg, in LowerFormalArguments()
782 RV = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), RV, in LowerCall()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 259 if (TruncInput.getOpcode() == ISD::AssertZext && in MatchingStackOffset()
910 ArgValue = DAG.getNode(ISD::AssertZext, DL, RegVT, ArgValue, in LowerFormalArguments()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 474 ArgValue = DAG.getNode(ISD::AssertZext, DL, RegVT, ArgValue, in LowerCCCArguments()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 1696 unsigned Opc = Arg->Flags.isZExt() ? ISD::AssertZext : ISD::AssertSext; in convertArgType()
2447 Arg = DAG.getNode(ISD::AssertZext, DL, Arg.getValueType(), Arg, in LowerFormalArguments()
2478 Val = DAG.getNode(ISD::AssertZext, DL, VT, Val, in LowerFormalArguments()
2497 Val = DAG.getNode(ISD::AssertZext, DL, VT, Val, in LowerFormalArguments()
2697 Val = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Val, in LowerCallResult()
5823 return DAG.getNode(ISD::AssertZext, SL, MVT::i32, Param, in lowerImplicitZextParam()
9094 SDValue Ext = DAG.getNode(ISD::AssertZext, SL, VT, BFE, in performAndCombine()
11096 if (Op.getOpcode() == ISD::AssertZext) in isFrameIndexOp()
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| H A D | AMDGPUISelLowering.cpp | 610 setTargetDAGCombine(ISD::AssertZext); in AMDGPUTargetLowering()
4204 case ISD::AssertZext: in PerformDAGCombine()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 664 ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue, in LowerCCCArguments()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 504 setTargetDAGCombine(ISD::AssertZext); in MipsTargetLowering()
3534 Val = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Val, in LowerCallResult()
3596 Val = DAG.getNode(ISD::AssertZext, DL, LocVT, Val, DAG.getValueType(ValVT)); in UnpackFromArgumentSlot()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 615 Arg = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Arg, in LowerFormalArguments_64()
1333 RV = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), RV, in LowerCall_64()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 1192 ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue, in LowerFormalArguments()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrCompiler.td | 1355 // be copying from a truncate. AssertSext/AssertZext/AssertAlign aren't saying
1364 N->getOpcode() != ISD::AssertZext &&
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| /freebsd-13.1/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 707 def assertzext : SDNode<"ISD::AssertZext", SDT_assert>;
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 1622 case ISD::AssertZext: { in getValueBits()
3015 (Input.getOperand(0).getOpcode() == ISD::AssertZext || in zeroExtendInputIfNeeded()
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