Searched refs:Add1 (Results 1 – 7 of 7) sorted by relevance
| /freebsd-13.1/contrib/llvm-project/clang/include/clang/StaticAnalyzer/Core/PathSensitive/ |
| H A D | BasicValueFactory.h | 207 const llvm::APSInt &Add1(const llvm::APSInt &V) { in Add1() function
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 3847 SDValue Add1 = ShiftAmt->getOperand(1); in tryShiftAmountMod() local 3849 auto *Add1C = dyn_cast<ConstantSDNode>(Add1); in tryShiftAmountMod() 3861 X = Add1; in tryShiftAmountMod() 3866 if (Add1.getOpcode() == ISD::TRUNCATE) { in tryShiftAmountMod() 3867 Add1 = Add1.getOperand(0); in tryShiftAmountMod() 3868 SubVT = Add1.getValueType(); in tryShiftAmountMod() 3875 X = CurDAG->getNode(ISD::ADD, DL, SubVT, Add1, Add0); in tryShiftAmountMod()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 2986 auto Add1 = B.buildMerge(S64, {Add1_Lo, Add1_Hi}); in legalizeUnsignedDIV_REM64Impl() local 2988 auto MulLo2 = B.buildMul(S64, NegDenom, Add1); in legalizeUnsignedDIV_REM64Impl() 2989 auto MulHi2 = B.buildUMulH(S64, Add1, MulLo2); in legalizeUnsignedDIV_REM64Impl()
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| H A D | AMDGPUISelLowering.cpp | 1906 SDValue Add1 = DAG.getBitcast(VT, in LowerUDIVREM64() local 1909 SDValue Mullo2 = DAG.getNode(ISD::MUL, DL, VT, Neg_RHS, Add1); in LowerUDIVREM64() 1910 SDValue Mulhi2 = DAG.getNode(ISD::MULHU, DL, VT, Add1, Mullo2); in LowerUDIVREM64()
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| H A D | SIISelLowering.cpp | 10309 SDValue Add1 = DAG.getNode(Opc, SL, VT, Op0, Op1); in reassociateScalarOps() local 10310 return DAG.getNode(Opc, SL, VT, Add1, Op2); in reassociateScalarOps()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 2826 SDValue Add1 = ShiftAmt->getOperand(1); in tryShiftAmountMod() local 2831 if (isIntImmediate(Add1, Add1Imm) && (Add1Imm % Size == 0)) in tryShiftAmountMod() 2852 CurDAG->getMachineNode(NegOpc, DL, SubVT, Zero, Add1); in tryShiftAmountMod()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 1097 SDValue Add1 = DAG.getNode(ISD::ADD, DL, ValTy, N->getOperand(0), in performADDCombine() local 1099 return DAG.getNode(ISD::ADD, DL, ValTy, Add1, Lo); in performADDCombine()
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