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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86.td121 def FeatureAVX : SubtargetFeature<"avx", "X86SSELevel", "AVX",
122 "Enable AVX instructions",
134 "Enable AVX-512 instructions",
146 "Enable AVX-512 PreFetch Instructions",
155 "Enable AVX-512 Byte and Word Instructions",
158 "Enable AVX-512 Vector Length eXtensions",
167 "Enable AVX-512 Integer Fused Multiple-Add",
181 "Enable AVX-512 Bit Algorithms",
415 // similar to Skylake Server (AVX-512).
422 "Prefer 128-bit AVX instructions">;
[all …]
H A DX86InstrFormats.td501 // AVX instructions have a 'v' prefix in the mnemonic
518 // AVX instructions have a 'v' prefix in the mnemonic
532 // AVX instructions have a 'v' prefix in the mnemonic
547 // AVX instructions have a 'v' prefix in the mnemonic
570 // AVX instructions have a 'v' prefix in the mnemonic
581 // VSSI - SSE1 instructions with XS prefix in AVX form.
700 // classes. They need to be enabled even if AVX is enabled.
753 // AVX Instruction Templates:
756 // AVX8I - AVX instructions with T8PD prefix.
782 // AVX-512 Instruction Templates:
[all …]
H A DX86CallingConv.td223 // Boolean vectors of AVX-512 are returned in SIMD registers.
224 // The call from AVX to AVX-512 function should work,
241 // supported while using the AVX target feature.
247 // supported while using the AVX-512 target feature.
544 // Boolean vectors of AVX-512 are passed in SIMD registers.
545 // The call from AVX to AVX-512 function should work,
704 // AVX
708 // AVX-512
778 // AVX 256-bit vector arguments are passed in YMM registers.
837 // Boolean vectors of AVX-512 are passed in SIMD registers.
[all …]
H A DX86RegisterInfo.td251 // YMM0-15 registers, used by AVX instructions and
252 // YMM16-31 registers, used by AVX-512 instructions.
260 // ZMM Registers, used by AVX-512 instructions.
281 // Mask Registers, used by AVX-512 instructions.
589 // AVX-512 vector/mask registers.
597 // Scalar AVX-512 floating point registers.
602 // Extended VR128 and VR256 for AVX-512 instructions
H A DX86Subtarget.h62 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2, AVX512F enumerator
636 bool hasAVX() const { return X86SSELevel >= AVX; } in hasAVX()
H A DX86ScheduleBtVer2.td25 // FIXME: SSE4/AVX is unimplemented. This flag is set to allow
802 // AVX instructions.
830 // SSE2/AVX Store Selected Bytes of Double Quadword - (V)MASKMOVDQ
992 // AVX Zero-idioms.
1025 // AVX
1044 // AVX variants.
H A DX86ScheduleZnver3.td1501 // AVX variants.
1509 // AVX YMM variants.
1609 // AVX XMM Zero-idioms.
1624 // AVX YMM Zero-idioms.
1659 // AVX XMM
1664 // AVX YMM
H A DX86ScheduleBdVer2.td1310 // AVX instructions.
1424 // AVX Zero-idioms.
1456 // AVX
H A DX86InstrAVX512.td517 // AVX-512 - VECTOR INSERT
813 // AVX-512 VECTOR EXTRACT
1140 // AVX-512 BROADCAST
1904 // AVX-512 - BLEND using mask
3908 // AVX-512 MOVSS, MOVSD
4455 // AVX-512 - Non-temporals
5260 // AVX-512 FP arithmetic
6201 // AVX-512 - VPERMIL
6279 // AVX-512 - VPSHUFB
10755 // AVX-512 - MOVDDUP
[all …]
H A DX86InstrSSE.td124 // AVX & SSE - Zero/One Vectors
211 // AVX
1206 // AVX aliases
1730 // AVX register conversion intrinsics
3714 // Packed Integer Pack Instructions (SSE & AVX)
5064 // SSE4.1/AVX patterns.
5658 // The bit test instructions below are AVX only
6584 // No CRC instructions have AVX equivalents
6860 // AVX carry-less Multiplication instructions
6911 // AVX aliases
[all …]
/freebsd-13.1/sys/contrib/openzfs/lib/libspl/include/sys/
H A Dsimd.h66 AVX, enumerator
118 [AVX] = {1U, 0U, 1U << 28, ECX },
190 CPUID_FEATURE_CHECK(avx, AVX);
/freebsd-13.1/crypto/openssl/doc/man3/
H A DOPENSSL_ia32cap.pod58 =item bit #60 denoting AVX extension;
121 ':~0x20' would disable AVX2 code paths, and ':0' - all post-AVX
132 AVX | 2.19 | 2.09 | 3.0
/freebsd-13.1/contrib/llvm-project/clang/lib/Basic/Targets/
H A DX86.cpp335 .Case("+avx", AVX) in handleTargetFeatures()
765 case AVX: in getTargetDefines()
796 case AVX: in getTargetDefines()
943 .Case("avx", SSELevel >= AVX) in hasFeature()
H A DX86.h60 AVX, enumerator
301 if (getTriple().getArch() == llvm::Triple::x86_64 && SSELevel >= AVX) in getABI()
/freebsd-13.1/sys/contrib/libsodium/
H A Dconfigure.ac435 AC_MSG_CHECKING(for AVX instructions set)
438 # error NativeClient detected - Avoiding AVX opcodes
444 AC_DEFINE([HAVE_AVXINTRIN_H], [1], [AVX is available])
632 AC_MSG_CHECKING(whether we can assemble AVX opcodes)
646 AC_DEFINE([HAVE_AVX_ASM], [1], [AVX opcodes are supported])
H A DChangeLog70 AVX* when temperature/power consumption is a concern.
207 - Handle the case where the CPU supports AVX, but we are running
208 on an hypervisor with AVX disabled/not supported.
217 merged in, and is automatically used on CPUs supporting the AVX
/freebsd-13.1/sys/contrib/openzfs/config/
H A Dtoolchain-simd.m4153 AC_MSG_CHECKING([whether host toolchain supports AVX])
163 AC_DEFINE([HAVE_AVX], 1, [Define if host toolchain supports AVX])
/freebsd-13.1/sys/contrib/openzfs/module/icp/asm-x86_64/modes/
H A Dghash-x86_64.S71 # Broadwell 0.45(+110%)(if system doesn't support AVX)
75 # Knights L 2.12(-) (if system doesn't support AVX)
80 # ... 8x aggregate factor AVX code path is using reduction algorithm
81 # suggested by Shay Gueron[1]. Even though contemporary AVX-capable
/freebsd-13.1/sys/xen/interface/arch-x86/
H A Dcpufeatureset.h150 XEN_CPUFEATURE(AVX, 1*32+28) /*A Advanced Vector Extensions */
/freebsd-13.1/sys/contrib/libb2/
H A Dblake2-dispatch.c30 AVX = 4, enumerator
126 feature = AVX; in get_cpu_features()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Analysis/
H A DVFABIDemangling.cpp39 .Case("c", VFISAKind::AVX) in tryParseISA()
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/Support/
H A DX86TargetParser.def113 X86_FEATURE_COMPAT(AVX, "avx")
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DVectorUtils.h48 AVX, // x86 AVX enumerator
/freebsd-13.1/contrib/llvm-project/clang/include/clang/Basic/
H A DDiagnosticFrontendKinds.td256 : Warning<"AVX vector %select{return|argument}0 of type %1 without '%2' "
/freebsd-13.1/contrib/llvm-project/llvm/lib/Support/Windows/
H A DSignals.inc232 // at AVX registers, which typically aren't needed by StackWalk64. Reduce the

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