| /freebsd-13.1/contrib/llvm-project/compiler-rt/lib/builtins/hexagon/ |
| H A D | fastmath2_ldlib_asm.S | 89 lmanta = ASR(lmanta, expa)
90 lmantb = ASR(lmantb, expb)
188 lmanta = ASR(lmanta, expa)
189 lmantb = ASR(lmantb, expb)
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| H A D | fastmath_dlib_asm.S | 104 lmanta = ASR(lmanta, expa)
105 lmantb = ASR(lmantb, expb)
239 lmanta = ASR(lmanta, expa)
240 lmantb = ASR(lmantb, expb)
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| H A D | fastmath2_dlib_asm.S | 96 lmanta = ASR(lmanta, expa)
97 lmantb = ASR(lmantb, expb)
197 lmanta = ASR(lmanta, expa)
198 lmantb = ASR(lmantb, expb)
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| H A D | dfdiv.S | 169 DIV_ITER1B(ASR,1,15,)
170 DIV_ITER1B(ASR,16,15,)
171 DIV_ITER1B(ASR,31,15,PROD=# ( 0 );)
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| H A D | dfaddsub.S | 117 BTMP = ASR(BTMP,EXPDIFF)
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kInstrShiftRotate.td | 15 /// SHL [~] ASR [~] LSR [~] SWAP [ ]
89 defm ASR : MxSROp<"asr", sra, MxRODI_R, MxROOP_AS>;
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64AddressingModes.h | 36 ASR, enumerator
57 case AArch64_AM::ASR: return "asr"; in getShiftExtendName()
78 case 2: return AArch64_AM::ASR; in getShiftType()
106 case AArch64_AM::ASR: STEnc = 2; break; in getShifterImm()
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.h | 44 ASR, ///< Arithmetic shift right. enumerator
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| H A D | AVRISelLowering.cpp | 250 NODE(ASR); in getTargetNodeName()
317 Opc8 = AVRISD::ASR; in LowerShifts()
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| H A D | AVRInstrInfo.td | 61 def AVRasr : SDNode<"AVRISD::ASR", SDTIntUnaryOp>;
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| /freebsd-13.1/contrib/llvm-project/lldb/source/Plugins/Process/Utility/ |
| H A D | ARMUtils.h | 155 static inline uint32_t ASR(const uint32_t value, const uint32_t amount, in ASR() function
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | FunctionComparator.cpp | 695 unsigned int ASR = GEPR->getPointerAddressSpace(); in cmpGEPs() local
697 if (int Res = cmpNumbers(ASL, ASR)) in cmpGEPs()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/Utils/ |
| H A D | AArch64BaseInfo.h | 497 ASR, enumerator
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SchedPredicates.td | 50 def CheckShiftASR : CheckImmOperand_s<3, "AArch64_AM::ASR">;
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| H A D | AArch64FastISel.cpp | 1254 case Instruction::AShr: ShiftType = AArch64_AM::ASR; break; in emitAddSub()
3697 emitSubs_rs(VT, SMULHReg, MulReg, AArch64_AM::ASR, 63, in fastLowerIntrinsicCall()
4854 AArch64_AM::ASR, Lg2); in selectSDiv()
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| H A D | AArch64InstrInfo.cpp | 924 (AArch64_AM::getShiftType(Imm) == AArch64_AM::ASR && ShiftVal == 31); in isFalkorShiftExtFast()
932 (AArch64_AM::getShiftType(Imm) == AArch64_AM::ASR && ShiftVal == 63); in isFalkorShiftExtFast()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcRegisterInfo.td | 363 (add Y, (sequence "ASR%u", 1, 31))>;
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMScheduleM7.td | 338 def : InstRW<[WriteALUsi], (instregex "(t|t2)(LSL|LSR|ASR|ROR)")>;
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| H A D | ARMInstrThumb.td | 1076 // ASR immediate
1087 // ASR register
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| H A D | ARMScheduleSwift.td | 154 // ASR,LSL,ROR,RRX
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| H A D | ARMScheduleA57.td | 219 // (ASR, LSL, LSR, ROR, RRX)=MOVsi, MVN
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 1339 ST == AArch64_AM::ASR || ST == AArch64_AM::ROR || in isShifter()
1434 ST == AArch64_AM::ASR) && getShiftExtendAmount() < width; in isArithmeticShifter()
1445 ST == AArch64_AM::ASR || ST == AArch64_AM::ROR) && in isLogicalShifter()
3204 .Case("asr", AArch64_AM::ASR) in tryParseOptionalShiftExtend()
3227 ShOp == AArch64_AM::ASR || ShOp == AArch64_AM::ROR || in tryParseOptionalShiftExtend()
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| /freebsd-13.1/share/misc/ |
| H A D | pci_vendors | 33596 9005 0296 ASR-2240S
33598 9005 0298 ASR-4000
33627 9005 02d4 ASR-2045
33628 9005 02d5 ASR-2405
33629 9005 02d6 ASR-2445
33630 9005 02d7 ASR-2805
33638 9005 02df ASR-2045G
33639 9005 02e0 ASR-2405G
33640 9005 02e1 ASR-2445G
33641 9005 02e2 ASR-2805G
[all …]
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCInstrInfo.td | 273 defm ASR : ArcBinaryEXT5Inst<0b000010, "asr">;
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 5859 return AArch64_AM::ASR; in getShiftTypeForInst()
|