Searched refs:shift_type (Results 1 – 4 of 4) sorted by relevance
| /freebsd-12.1/contrib/llvm/tools/lldb/source/Plugins/Instruction/ARM/ |
| H A D | EmulateInstructionARM.h | 449 ARM_ShifterType shift_type); 453 ARM_ShifterType shift_type);
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| H A D | EmulateInstructionARM.cpp | 3757 ARM_ShifterType shift_type) { in EmulateShiftImm() argument 3776 if (shift_type == SRType_ROR && use_encoding == eEncodingT1) { in EmulateShiftImm() 3786 if (shift_type == SRType_ROR) in EmulateShiftImm() 3797 if (shift_type == SRType_RRX) in EmulateShiftImm() 3818 if (shift_type == SRType_ROR && imm5 == 0) in EmulateShiftImm() 3819 shift_type = SRType_RRX; in EmulateShiftImm() 3828 (shift_type == SRType_RRX ? 1 : DecodeImmShift(shift_type, imm5)); in EmulateShiftImm() 3830 uint32_t result = Shift_C(value, shift_type, amt, APSR_C, carry, &success); in EmulateShiftImm() 3847 ARM_ShifterType shift_type) { in EmulateShiftReg() argument 3901 uint32_t result = Shift_C(value, shift_type, amt, APSR_C, carry, &success); in EmulateShiftReg()
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| /freebsd-12.1/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrFormats.td | 1793 class BaseShift<bits<2> shift_type, RegisterClass regtype, string asm, 1797 let Inst{11-10} = shift_type; 1800 multiclass Shift<bits<2> shift_type, string asm, SDNode OpNode> { 1801 def Wr : BaseShift<shift_type, GPR32, asm> { 1805 def Xr : BaseShift<shift_type, GPR64, asm, OpNode> {
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| /freebsd-12.1/contrib/gcc/ |
| H A D | ChangeLog-2002 | 8474 (enum shift_type, enum h8_cpu): Likewise.
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