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Searched refs:setDesc (Results 1 – 25 of 79) sorted by relevance

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/freebsd-12.1/contrib/llvm/lib/Target/WebAssembly/
H A DWebAssemblyLowerBrUnless.cpp82 Def->setDesc(TII.get(NE_I32)); in runOnMachineFunction()
86 Def->setDesc(TII.get(EQ_I32)); in runOnMachineFunction()
90 Def->setDesc(TII.get(LE_S_I32)); in runOnMachineFunction()
94 Def->setDesc(TII.get(LT_S_I32)); in runOnMachineFunction()
98 Def->setDesc(TII.get(GE_S_I32)); in runOnMachineFunction()
122 Def->setDesc(TII.get(NE_I64)); in runOnMachineFunction()
126 Def->setDesc(TII.get(EQ_I64)); in runOnMachineFunction()
162 Def->setDesc(TII.get(NE_F32)); in runOnMachineFunction()
166 Def->setDesc(TII.get(EQ_F32)); in runOnMachineFunction()
170 Def->setDesc(TII.get(NE_F64)); in runOnMachineFunction()
[all …]
H A DWebAssemblyRegStackify.cpp108 MI->setDesc(TII->get(WebAssembly::CONST_I32)); in ConvertImplicitDefToConstZero()
111 MI->setDesc(TII->get(WebAssembly::CONST_I64)); in ConvertImplicitDefToConstZero()
114 MI->setDesc(TII->get(WebAssembly::CONST_F32)); in ConvertImplicitDefToConstZero()
119 MI->setDesc(TII->get(WebAssembly::CONST_F64)); in ConvertImplicitDefToConstZero()
125 MI->setDesc(TII->get(WebAssembly::SPLAT_v4i32)); in ConvertImplicitDefToConstZero()
H A DWebAssemblyCallIndirectFixup.cpp114 MI.setDesc(Desc); in runOnMachineFunction()
/freebsd-12.1/contrib/llvm/lib/Target/ARM/
H A DARMInstructionSelector.cpp605 MIB->setDesc(TII.get(Opc)); in selectGlobal()
625 MIB->setDesc(TII.get(Opc)); in selectGlobal()
716 MIB->setDesc(TII.get(ARM::MOVsr)); in selectShift()
791 I.setDesc(TII.get(NewOpc)); in select()
847 I.setDesc(TII.get(COPY)); in select()
872 I.setDesc(TII.get(ARM::MOVi)); in select()
897 I.setDesc(TII.get(COPY)); in select()
934 I.setDesc(TII.get(ARM::ADDrr)); in select()
940 I.setDesc(TII.get(ARM::ADDri)); in select()
966 I.setDesc(TII.get(NewOpc)); in select()
[all …]
H A DThumb2InstrInfo.cpp491 MI.setDesc(TII.get(ARM::tMOVr)); in rewriteT2FrameIndex()
506 MI.setDesc(TII.get(ARM::t2SUBri)); in rewriteT2FrameIndex()
508 MI.setDesc(TII.get(ARM::t2ADDri)); in rewriteT2FrameIndex()
525 MI.setDesc(TII.get(NewOpc)); in rewriteT2FrameIndex()
630 MI.setDesc(TII.get(NewOpc)); in rewriteT2FrameIndex()
663 MI.setDesc(TII.get(positiveOffsetOpcode(NewOpc))); in rewriteT2FrameIndex()
H A DThumbRegisterInfo.cpp407 MI.setDesc(TII.get(NewOpc)); in rewriteFrameIndex()
585 MI.setDesc(TII.get(UseRR ? ARM::tLDRr : ARM::tLDRi)); in eliminateFrameIndex()
607 MI.setDesc(TII.get(UseRR ? ARM::tSTRr : ARM::tSTRi)); in eliminateFrameIndex()
/freebsd-12.1/contrib/llvm/lib/Target/SystemZ/
H A DSystemZShortenInst.cpp95 MI.setDesc(TII->get(LLIxL)); in shortenIIF()
100 MI.setDesc(TII->get(LLIxH)); in shortenIIF()
111 MI.setDesc(TII->get(Opcode)); in shortenOn0()
122 MI.setDesc(TII->get(Opcode)); in shortenOn01()
135 MI.setDesc(TII->get(Opcode)); in shortenOn001()
168 MI.setDesc(TII->get(Opcode)); in shortenFPConv()
H A DSystemZInstrInfo.cpp122 EarlierMI->setDesc(get(HighOpcode)); in splitMove()
123 MI->setDesc(get(LowOpcode)); in splitMove()
138 MI->setDesc(get(NewOpcode)); in splitAdjDynAlloc()
170 MI.setDesc(get(LowOpcodeK)); in expandRIEPseudo()
189 MI.setDesc(get(Opcode)); in expandRXYPseudo()
199 MI.setDesc(get(Opcode)); in expandLOCPseudo()
213 MI.setDesc(get(LowOpcode)); in expandLOCRPseudo()
215 MI.setDesc(get(HighOpcode)); in expandLOCRPseudo()
267 MI->setDesc(get(SystemZ::LG)); in expandLoadStackGuard()
677 UseMI.setDesc(get(NewUseOpc)); in FoldImmediate()
[all …]
H A DSystemZLongBranch.cpp395 Branch->setDesc(TII->get(SystemZ::JG)); in relaxBranch()
398 Branch->setDesc(TII->get(SystemZ::BRCL)); in relaxBranch()
H A DSystemZElimCompare.cpp232 Branch->setDesc(TII->get(BRCT)); in convertToBRCT()
275 Branch->setDesc(TII->get(LATOpcode)); in convertToLoadAndTrap()
563 Branch->setDesc(TII->get(FusedOpcode)); in fuseCompareOperations()
/freebsd-12.1/contrib/llvm/lib/CodeGen/
H A DExpandPostRAPseudos.cpp99 MI->setDesc(TII->get(TargetOpcode::KILL)); in LowerSubregToReg()
112 MI->setDesc(TII->get(TargetOpcode::KILL)); in LowerSubregToReg()
139 MI->setDesc(TII->get(TargetOpcode::KILL)); in LowerCopy()
156 MI->setDesc(TII->get(TargetOpcode::KILL)); in LowerCopy()
H A DProcessImplicitDefs.cpp88 UserMI->setDesc(TII->get(TargetOpcode::IMPLICIT_DEF)); in processImplicitDef()
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DSIShrinkInstructions.cpp201 MI.setDesc(TII->get(SOPKOpc)); in shrinkScalarCompare()
211 MI.setDesc(NewDesc); in shrinkScalarCompare()
276 MI.setDesc(TII->get(Opc)); in shrinkScalarLogicOp()
487 MI.setDesc(TII->get(AMDGPU::V_BFREV_B32_e32)); in runOnMachineFunction()
560 MI.setDesc(TII->get(Opc)); in runOnMachineFunction()
581 MI.setDesc(TII->get(AMDGPU::S_MOVK_I32)); in runOnMachineFunction()
583 MI.setDesc(TII->get(AMDGPU::S_BREV_B32)); in runOnMachineFunction()
H A DSIOptimizeExecMasking.cpp144 MI.setDesc(TII.get(AMDGPU::COPY)); in removeTerminatorBit()
150 MI.setDesc(TII.get(AMDGPU::S_XOR_B64)); in removeTerminatorBit()
156 MI.setDesc(TII.get(AMDGPU::S_ANDN2_B64)); in removeTerminatorBit()
H A DSIFoldOperands.cpp239 MI->setDesc(TII.get(AMDGPU::IMPLICIT_DEF)); in updateOperand()
299 MI->setDesc(TII->get(NewOpc)); in tryAddToFoldList()
305 MI->setDesc(TII->get(Opc)); in tryAddToFoldList()
310 MI->setDesc(TII->get(AMDGPU::S_SETREG_IMM32_B32)); in tryAddToFoldList()
486 UseMI->setDesc(TII->get(MovOp)); in foldOperand()
626 MI.setDesc(NewDesc); in mutateCopyOp()
683 MI->setDesc(TII->get(UseCopy ? AMDGPU::COPY : AMDGPU::V_MOV_B32_e32)); in tryConstantFoldOp()
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/
H A DAArch64InstructionSelector.cpp434 I.setDesc(TII.get(AArch64::COPY)); in selectCopy()
825 I.setDesc(TII.get(AArch64::BR)); in select()
882 I.setDesc(TII.get(MovOpc)); in select()
992 I.setDesc(TII.get(AArch64::ADDXri)); in select()
1009 I.setDesc(TII.get(AArch64::LOADgot)); in select()
1017 I.setDesc(TII.get(AArch64::ADR)); in select()
1064 I.setDesc(TII.get(NewOpc)); in select()
1126 I.setDesc(TII.get(NewOpc)); in select()
1155 I.setDesc(TII.get(NewOpc)); in select()
1169 I.setDesc(TII.get(AArch64::ANDXri)); in select()
[all …]
H A DAArch64CompressJumpTables.cpp123 MI.setDesc(TII->get(AArch64::JumpTableDest8)); in compressJumpTable()
128 MI.setDesc(TII->get(AArch64::JumpTableDest16)); in compressJumpTable()
/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86InstructionSelector.cpp308 I.setDesc(TII.get(X86::COPY)); in selectCopy()
529 I.setDesc(TII.get(NewOpc)); in selectLoadStoreOp()
565 I.setDesc(TII.get(NewOpc)); in selectFrameIndexOrGep()
617 I.setDesc(TII.get(NewOpc)); in selectGlobalValue()
669 I.setDesc(TII.get(NewOpc)); in selectConstant()
694 I.setDesc(TII.get(X86::COPY)); in selectTurnIntoCOPY()
760 I.setDesc(TII.get(X86::COPY)); in selectTruncOrPtrToInt()
915 I.setDesc(TII.get(X86::COPY)); in selectAnyext()
1303 I.setDesc(TII.get(X86::VINSERTF128rr)); in selectInsert()
1507 I.setDesc(TII.get(X86::IMPLICIT_DEF)); in selectImplicitDefOrPHI()
[all …]
H A DX86FloatingPoint.cpp838 I->setDesc(TII->get(Opcode)); in popStackAfter()
1098 MI.setDesc(TII->get(getConcreteOpcode(MI.getOpcode()))); in handleZeroArgFP()
1142 MI.setDesc(TII->get(getConcreteOpcode(MI.getOpcode()))); in handleOneArgFP()
1192 MI.setDesc(TII->get(getConcreteOpcode(MI.getOpcode()))); in handleOneArgFPRW()
1390 MI.setDesc(TII->get(getConcreteOpcode(MI.getOpcode()))); in handleCompareFP()
1416 MI.setDesc(TII->get(getConcreteOpcode(MI.getOpcode()))); in handleCondMovFP()
/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.cpp1431 MI.setDesc(get(PPC::BCLR)); in PredicateInstruction()
1453 MI.setDesc(get(PPC::BC)); in PredicateInstruction()
1461 MI.setDesc(get(PPC::BCn)); in PredicateInstruction()
1469 MI.setDesc(get(PPC::BCC)); in PredicateInstruction()
1959 MI->setDesc(NewDesc); in optimizeCompareInstr()
2106 MI.setDesc(get(Opcode)); in expandVSXMemPseudo()
2167 MI.setDesc(get(PPC::LD)); in expandPostRAPseudo()
2178 MI.setDesc(get(PPC::STD)); in expandPostRAPseudo()
2187 MI.setDesc(get(PPC::LDX)); in expandPostRAPseudo()
2197 MI.setDesc(get(PPC::STDX)); in expandPostRAPseudo()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/Sparc/
H A DDelaySlotFiller.cpp189 slot->setDesc(Subtarget->getInstrInfo()->get(SP::RET)); in findDelayInstr()
392 AddMI->setDesc(TII->get((AddMI->getOpcode() == SP::ADDrr) in combineRestoreADD()
431 OrMI->setDesc(TII->get((OrMI->getOpcode() == SP::ORrr) in combineRestoreOR()
468 RestoreMI->setDesc(TII->get(SP::RESTOREri)); in combineRestoreSETHIi()
H A DSparcRegisterInfo.cpp193 MI.setDesc(TII.get(SP::STDFri)); in eliminateFrameIndex()
206 MI.setDesc(TII.get(SP::LDDFri)); in eliminateFrameIndex()
/freebsd-12.1/contrib/llvm/include/llvm/MC/
H A DMCSymbolMachO.h101 void setDesc(unsigned Value) const { in setDesc() function
/freebsd-12.1/contrib/llvm/lib/Target/Mips/
H A DMipsConstantIslandPass.cpp1120 UserMI->setDesc(TII->get(U.getLongFormOpcode())); in findLongFormInRangeCPEntry()
1523 MI->setDesc(TII->get(Mips::BimmX16)); in fixupUnconditionalBr()
1539 MI->setDesc(TII->get(Mips::JalB16)); in fixupUnconditionalBr()
1566 MI->setDesc(TII->get(LongFormOpcode)); in fixupConditionalBr()
1604 MI->setDesc(TII->get(OppositeBranchOpcode)); in fixupConditionalBr()
1674 I->setDesc(TII->get(Mips::LwRxPcTcp16)); in prescanForConstants()
/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/
H A DHexagonRegisterInfo.cpp207 MI.setDesc(HII.get(Hexagon::A2_addi)); in eliminateFrameIndex()
213 MI.setDesc(HII.get(Hexagon::A2_addi)); in eliminateFrameIndex()

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