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Searched refs:reg_offset (Results 1 – 25 of 36) sorted by relevance

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/freebsd-12.1/sys/dev/drm2/i915/
H A Dintel_iic.c242 I915_WRITE(GMBUS1 + reg_offset, in gmbus_xfer_read()
261 val = I915_READ(GMBUS3 + reg_offset); in gmbus_xfer_read()
285 I915_WRITE(GMBUS3 + reg_offset, val); in gmbus_xfer_write()
286 I915_WRITE(GMBUS1 + reg_offset, in gmbus_xfer_write()
300 I915_WRITE(GMBUS3 + reg_offset, val); in gmbus_xfer_write()
348 I915_WRITE(GMBUS5 + reg_offset, 0); in gmbus_xfer_index_read()
361 int i, reg_offset; in gmbus_xfer() local
417 I915_WRITE(GMBUS0 + reg_offset, 0); in gmbus_xfer()
447 I915_WRITE(GMBUS1 + reg_offset, 0); in gmbus_xfer()
448 I915_WRITE(GMBUS0 + reg_offset, 0); in gmbus_xfer()
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/freebsd-12.1/contrib/gdb/gdb/
H A Dia64-fbsd-tdep.c39 static int reg_offset[462] = { variable
109 ofs = reg_offset[regno]; in ia64_fbsd_regcache_collect()
133 ofs = reg_offset[regno]; in ia64_fbsd_regcache_supply()
142 bsp += *((uint64_t*)((char *)regs + reg_offset[IA64_BSPSTORE_REGNUM])); in ia64_fbsd_regcache_supply()
H A Damd64-nat.c58 int *reg_offset = amd64_native_gregset64_reg_offset; in amd64_native_gregset_reg_offset() local
65 reg_offset = amd64_native_gregset32_reg_offset; in amd64_native_gregset_reg_offset()
73 return reg_offset[regnum]; in amd64_native_gregset_reg_offset()
H A Damd64fbsd-nat.c58 static int reg_offset[] = variable
158 amd64_native_gregset64_reg_offset = reg_offset; in _initialize_amd64fbsd_nat()
H A Di386bsd-nat.c70 static int reg_offset[] = variable
98 #define REG_ADDR(regset, regno) ((char *) (regset) + reg_offset[regno])
115 return (reg_offset[regno] == -1); in cannot_fetch_register()
H A Dmips-tdep.c294 int reg_offset = 0; in mips_xfer_register() local
304 reg_offset = 0; in mips_xfer_register()
307 reg_offset = 0; in mips_xfer_register()
1498 long reg_offset; in mips_mdebug_frame_cache() local
2594 int reg_offset; member
2620 hi->reg_offset = lo->reg_offset; in return_value_location()
2639 hi->reg_offset = 0; in return_value_location()
2656 hi->reg_offset = 0; in return_value_location()
2667 hi->reg_offset = 0; in return_value_location()
2673 lo->reg_offset = 0; in return_value_location()
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H A Di386gnu-nat.c51 static int reg_offset[] = variable
59 #define REG_ADDR(state, regnum) ((char *)(state) + reg_offset[regnum])
H A Dvalops.c656 int reg_offset; in value_assign() local
665 for (reg_offset = value_reg, offset = 0; in value_assign()
666 offset + DEPRECATED_REGISTER_RAW_SIZE (reg_offset) <= VALUE_OFFSET (toval); in value_assign()
667 reg_offset++); in value_assign()
682 for (regno = reg_offset, amount_copied = 0; in value_assign()
699 for (regno = reg_offset, amount_copied = 0; in value_assign()
/freebsd-12.1/contrib/gcc/
H A Dpostreload.c1171 static HOST_WIDE_INT reg_offset[FIRST_PSEUDO_REGISTER]; variable
1262 if (INTVAL (src) == reg_offset [regno]) in reload_cse_move2add()
1280 && ((reg_offset[regno] in reload_cse_move2add()
1302 reg_offset[regno] = INTVAL (src); in reload_cse_move2add()
1364 reg_offset[regno] = in reload_cse_move2add()
1488 offset = reg_offset[REGNO (XEXP (src, 1))]; in move2add_note_store()
1497 offset = reg_offset[REGNO (base_reg)]; in move2add_note_store()
1519 reg_offset[regno] = INTVAL (SET_SRC (set)); in move2add_note_store()
1539 reg_offset[base_regno] = 0; in move2add_note_store()
1554 reg_offset[regno] = trunc_int_for_mode (offset in move2add_note_store()
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H A Dlocal-alloc.c217 static char *reg_offset; variable
325 reg_offset[regno] = 0; in alloc_qty()
379 reg_offset = XNEWVEC (char, max_regno); in local_alloc()
444 free (reg_offset); in local_alloc()
1730 reg_renumber[i] = qty[q].phys_reg + reg_offset[i]; in block_alloc()
2023 reg_offset[sreg] = reg_offset[ureg] + offset; in combine_regs()
2041 reg_offset[i] -= offset; in combine_regs()
/freebsd-12.1/sys/dev/qlnx/qlnxe/
H A Decore_init_fw_funcs.c1030 u32 ctrl, inc_val, reg_offset; in ecore_init_nig_lb_rl() local
1070 for (tc = 0, reg_offset = 0; tc < NUM_OF_PHYS_TCS; tc++, reg_offset += 4) { in ecore_init_nig_lb_rl()
1074 ecore_wr(p_hwfn, p_ptt, NIG_REG_LB_TCRATELIMIT_CTRL_0 + reg_offset, ctrl); in ecore_init_nig_lb_rl()
1083 ecore_wr(p_hwfn, p_ptt, NIG_REG_LB_TCRATELIMIT_INC_VALUE_0 + reg_offset, inc_val); in ecore_init_nig_lb_rl()
1088 ecore_wr(p_hwfn, p_ptt, NIG_REG_LB_TCRATELIMIT_CTRL_0 + reg_offset, ctrl); in ecore_init_nig_lb_rl()
1197 u32 active_port_blocks, reg_offset = 0; in ecore_init_brb_ram() local
1233 for (tc = 0; tc < NUM_OF_TCS; tc++, reg_offset += 4) { in ecore_init_brb_ram()
1244 ecore_wr(p_hwfn, p_ptt, BRB_REG_TC_GUARANTIED_0 + reg_offset, tc_guaranteed_blocks); in ecore_init_brb_ram()
1250 ecore_wr(p_hwfn, p_ptt, BRB_REG_LB_TC_FULL_XOFF_THRESHOLD_0 + reg_offset, full_xoff_th); in ecore_init_brb_ram()
1251 ecore_wr(p_hwfn, p_ptt, BRB_REG_LB_TC_FULL_XON_THRESHOLD_0 + reg_offset, full_xon_th); in ecore_init_brb_ram()
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H A Decore_dbg_fw_funcs.c2467 u32 reg_offset = constraint_id * BYTES_IN_DWORD; in ecore_bus_set_constraint() local
3076 u32 offset = 0, reg_offset = 0; in ecore_grc_dump_reg_entry_skip() local
3083 while (reg_offset < total_len) { in ecore_grc_dump_reg_entry_skip()
3084 u32 curr_len = OSAL_MIN_T(u32, read_len, total_len - reg_offset); in ecore_grc_dump_reg_entry_skip()
3087 reg_offset += curr_len; in ecore_grc_dump_reg_entry_skip()
3090 if (reg_offset < total_len) { in ecore_grc_dump_reg_entry_skip()
3094 reg_offset += curr_len; in ecore_grc_dump_reg_entry_skip()
5413 u8 reg_offset; in ecore_dbg_bus_add_trigger_state() local
5439 reg_offset = bus->next_trigger_state * BYTES_IN_DWORD; in ecore_dbg_bus_add_trigger_state()
5445 reg_offset = bus->next_trigger_state * TRIGGER_SETS_PER_STATE * BYTES_IN_DWORD; in ecore_dbg_bus_add_trigger_state()
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H A Decore_cxt.c2402 u32 reg_offset, shadow_line, elem_size, hw_p_size, elems_per_p, line; in ecore_cxt_dynamic_ilt_alloc() local
2501 reg_offset = PSWRQ2_REG_ILT_MEMORY + in ecore_cxt_dynamic_ilt_alloc()
2512 reg_offset, sizeof(ilt_hw_entry) / sizeof(u32), in ecore_cxt_dynamic_ilt_alloc()
2555 u32 reg_offset, elem_size, hw_p_size, elems_per_p; in ecore_cxt_free_ilt_range() local
2616 reg_offset = PSWRQ2_REG_ILT_MEMORY + in ecore_cxt_free_ilt_range()
2625 reg_offset, in ecore_cxt_free_ilt_range()
H A Decore_hsi_debug_tools.h552 …u16 reg_offset /* offset of this rules registers in the idle check register array (in dbg_idle_chk… member
/freebsd-12.1/sys/dev/drm2/radeon/
H A Dni.c1291 u32 reg_offset, wb_offset; in cayman_dma_resume() local
1303 reg_offset = DMA0_REGISTER_OFFSET; in cayman_dma_resume()
1307 reg_offset = DMA1_REGISTER_OFFSET; in cayman_dma_resume()
1320 WREG32(DMA_RB_CNTL + reg_offset, rb_cntl); in cayman_dma_resume()
1323 WREG32(DMA_RB_RPTR + reg_offset, 0); in cayman_dma_resume()
1324 WREG32(DMA_RB_WPTR + reg_offset, 0); in cayman_dma_resume()
1327 WREG32(DMA_RB_RPTR_ADDR_HI + reg_offset, in cayman_dma_resume()
1329 WREG32(DMA_RB_RPTR_ADDR_LO + reg_offset, in cayman_dma_resume()
1342 WREG32(DMA_IB_CNTL + reg_offset, ib_cntl); in cayman_dma_resume()
1344 dma_cntl = RREG32(DMA_CNTL + reg_offset); in cayman_dma_resume()
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H A Dsi.c925 u32 reg_offset, gb_tile_moden, split_equal_to_row_size; in si_tiling_mode_table_init() local
942 for (reg_offset = 0; reg_offset < num_tile_mode_states; reg_offset++) { in si_tiling_mode_table_init()
943 switch (reg_offset) { in si_tiling_mode_table_init()
1178 WREG32(GB_TILE_MODE0 + (reg_offset * 4), gb_tile_moden); in si_tiling_mode_table_init()
1181 for (reg_offset = 0; reg_offset < num_tile_mode_states; reg_offset++) { in si_tiling_mode_table_init()
1182 switch (reg_offset) { in si_tiling_mode_table_init()
1417 WREG32(GB_TILE_MODE0 + (reg_offset * 4), gb_tile_moden); in si_tiling_mode_table_init()
/freebsd-12.1/sys/dev/ixgbe/
H A Dixgbe_mbx.c487 u32 reg_offset = (vf_number < 32) ? 0 : 1; in ixgbe_check_for_rst_pf() local
496 vflre = IXGBE_READ_REG(hw, IXGBE_VFLRE(reg_offset)); in ixgbe_check_for_rst_pf()
502 vflre = IXGBE_READ_REG(hw, IXGBE_VFLREC(reg_offset)); in ixgbe_check_for_rst_pf()
510 IXGBE_WRITE_REG(hw, IXGBE_VFLREC(reg_offset), (1 << vf_shift)); in ixgbe_check_for_rst_pf()
/freebsd-12.1/sys/contrib/alpine-hal/
H A Dal_hal_pcie.h955 unsigned int reg_offset);
971 unsigned int reg_offset,
H A Dal_hal_pcie.c2249 unsigned int reg_offset) in al_pcie_local_cfg_space_read() argument
2254 data = al_reg_read32(&regs->core_space[pcie_pf->pf_num].config_header[reg_offset]); in al_pcie_local_cfg_space_read()
2263 unsigned int reg_offset, in al_pcie_local_cfg_space_write() argument
2271 uint32_t *offset = &regs->core_space[pf_num].config_header[reg_offset]; in al_pcie_local_cfg_space_write()
/freebsd-12.1/contrib/llvm/tools/lldb/source/Plugins/Process/gdb-remote/
H A DProcessGDBRemote.cpp522 uint32_t reg_offset = 0; in BuildDynamicRegisterInfo() local
548 reg_offset, // offset in BuildDynamicRegisterInfo()
573 if (value.getAsInteger(0, reg_offset)) in BuildDynamicRegisterInfo()
574 reg_offset = UINT32_MAX; in BuildDynamicRegisterInfo()
633 reg_info.byte_offset = reg_offset; in BuildDynamicRegisterInfo()
635 reg_offset += reg_info.byte_size; in BuildDynamicRegisterInfo()
4383 reg_offset, // offset in ParseRegisters()
4509 reg_info.byte_offset = reg_offset; in ParseRegisters()
4511 reg_offset += reg_info.byte_size; in ParseRegisters()
4625 uint32_t reg_offset = 0; in GetGDBServerRegisterInfo() local
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/freebsd-12.1/contrib/llvm/tools/lldb/source/Expression/
H A DDWARFExpression.cpp414 int64_t reg_offset = m_data.GetSLEB128(&offset); in DumpLocation() local
419 s->Printf("[%s%+" PRIi64 "]", reg_info.name, reg_offset); in DumpLocation()
422 s->Printf("[%s%+" PRIi64 "]", reg_info.alt_name, reg_offset); in DumpLocation()
427 s->Printf("DW_OP_breg%i(0x%" PRIx64 ")", reg_num, reg_offset); in DumpLocation()
454 int64_t reg_offset = m_data.GetSLEB128(&offset); in DumpLocation() local
459 s->Printf("[%s%+" PRIi64 "]", reg_info.name, reg_offset); in DumpLocation()
462 s->Printf("[%s%+" PRIi64 "]", reg_info.alt_name, reg_offset); in DumpLocation()
468 reg_offset); in DumpLocation()
/freebsd-12.1/contrib/gdb/
H A DFREEBSD-diffs198 +static int reg_offset[462] = {
268 + ofs = reg_offset[regno];
282 + ofs = reg_offset[regno];
287 + IA64_BSP_REGNUM in the reg_offset array above is that of the
291 + bsp += *((uint64_t*)((char *)regs + reg_offset[IA64_BSPSTORE_REGNUM]));
/freebsd-12.1/contrib/gcc/config/mips/
H A Dmips.c480 unsigned int reg_offset; member
3794 info->reg_offset = (mips_abi == ABI_EABI && info->fpr_p in mips_arg_info()
3800 info->reg_offset += info->reg_offset & 1; in mips_arg_info()
3807 max_regs = MAX_ARGS_IN_REGISTERS - info->reg_offset; in mips_arg_info()
3835 cum->num_gprs = info.reg_offset + info.reg_words; in function_arg_advance()
3869 if (info.reg_offset == MAX_ARGS_IN_REGISTERS) in function_arg()
3922 reg = gen_rtx_REG (DFmode, FP_ARG_FIRST + info.reg_offset + i); in function_arg()
3948 reg = FP_ARG_FIRST + info.reg_offset; in function_arg()
3970 return gen_rtx_REG (mode, GP_ARG_FIRST + info.reg_offset); in function_arg()
3971 else if (info.reg_offset == 1) in function_arg()
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/freebsd-12.1/sys/dev/e1000/
H A De1000_82575.c2196 u32 reg_val, reg_offset; in e1000_vmdq_set_anti_spoofing_pf() local
2200 reg_offset = E1000_DTXSWC; in e1000_vmdq_set_anti_spoofing_pf()
2204 reg_offset = E1000_TXSWC; in e1000_vmdq_set_anti_spoofing_pf()
2210 reg_val = E1000_READ_REG(hw, reg_offset); in e1000_vmdq_set_anti_spoofing_pf()
2222 E1000_WRITE_REG(hw, reg_offset, reg_val); in e1000_vmdq_set_anti_spoofing_pf()
/freebsd-12.1/sys/dev/bxe/
H A Dbxe.c8073 int reg_offset; in bxe_attn_int_deasserted2() local
8154 val = REG_RD(sc, reg_offset); in bxe_attn_int_deasserted2()
8156 REG_WR(sc, reg_offset, val); in bxe_attn_int_deasserted2()
8176 int reg_offset; in bxe_attn_int_deasserted1() local
8196 REG_WR(sc, reg_offset, val); in bxe_attn_int_deasserted1()
8216 int reg_offset; in bxe_attn_int_deasserted0() local
8225 REG_WR(sc, reg_offset, val); in bxe_attn_int_deasserted0()
8243 REG_WR(sc, reg_offset, val); in bxe_attn_int_deasserted0()
9845 int reg_offset, reg_offset_en5; in bxe_init_def_sb() local
9866 reg_offset = (port) ? in bxe_init_def_sb()
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