Searched refs:pllctrl (Results 1 – 3 of 3) sorted by relevance
67 uint32_t pllctrl, dfsdiv, spf, spr, div_val; in nlm_get_device_frequency() local70 pllctrl = nlm_read_sys_reg(sysbase, SYS_PLL_CTRL); in nlm_get_device_frequency()78 spf = (pllctrl >> 3 & 0x7f) + 1; in nlm_get_device_frequency()79 spr = (pllctrl >> 1 & 0x03) + 1; in nlm_get_device_frequency()
79 pllctrl: pll-controller@2310000 { label80 compatible = "ti,keystone-pllctrl", "syscon";108 ti,syscon-pll = <&pllctrl 0xe4>;
206 * @param reg The PMU pllctrl register to be read.211 * @returns The pllctrl register value, or 0 if undefined by this hardware.222 * @param reg The PMU pllctrl register to be written.