Searched refs:meta_ctrl (Results 1 – 5 of 5) sorted by relevance
113 uint32_t meta_ctrl; member491 return p->meta_ctrl & ENA_ETH_IO_TX_DESC_L3_PROTO_IDX_MASK; in get_ena_eth_io_tx_desc_l3_proto_idx()496 p->meta_ctrl |= val & ENA_ETH_IO_TX_DESC_L3_PROTO_IDX_MASK; in set_ena_eth_io_tx_desc_l3_proto_idx()501 return (p->meta_ctrl & ENA_ETH_IO_TX_DESC_DF_MASK) >> ENA_ETH_IO_TX_DESC_DF_SHIFT; in get_ena_eth_io_tx_desc_DF()506 p->meta_ctrl |= (val << ENA_ETH_IO_TX_DESC_DF_SHIFT) & ENA_ETH_IO_TX_DESC_DF_MASK; in set_ena_eth_io_tx_desc_DF()511 return (p->meta_ctrl & ENA_ETH_IO_TX_DESC_TSO_EN_MASK) >> ENA_ETH_IO_TX_DESC_TSO_EN_SHIFT; in get_ena_eth_io_tx_desc_tso_en()516 p->meta_ctrl |= (val << ENA_ETH_IO_TX_DESC_TSO_EN_SHIFT) & ENA_ETH_IO_TX_DESC_TSO_EN_MASK; in set_ena_eth_io_tx_desc_tso_en()531 return (p->meta_ctrl & ENA_ETH_IO_TX_DESC_L3_CSUM_EN_MASK) >> ENA_ETH_IO_TX_DESC_L3_CSUM_EN_SHIFT; in get_ena_eth_io_tx_desc_l3_csum_en()536 p->meta_ctrl |= (val << ENA_ETH_IO_TX_DESC_L3_CSUM_EN_SHIFT) & ENA_ETH_IO_TX_DESC_L3_CSUM_EN_MASK; in set_ena_eth_io_tx_desc_l3_csum_en()571 return (p->meta_ctrl & ENA_ETH_IO_TX_DESC_REQ_ID_LO_MASK) >> ENA_ETH_IO_TX_DESC_REQ_ID_LO_SHIFT; in get_ena_eth_io_tx_desc_req_id_lo()[all …]
436 desc->meta_ctrl |= (ena_tx_ctx->req_id << in ena_com_prepare_tx()440 desc->meta_ctrl |= (ena_tx_ctx->df << in ena_com_prepare_tx()450 desc->meta_ctrl |= (ena_tx_ctx->tso_enable << in ena_com_prepare_tx()453 desc->meta_ctrl |= ena_tx_ctx->l3_proto & in ena_com_prepare_tx()455 desc->meta_ctrl |= (ena_tx_ctx->l4_proto << in ena_com_prepare_tx()458 desc->meta_ctrl |= (ena_tx_ctx->l3_csum_enable << in ena_com_prepare_tx()461 desc->meta_ctrl |= (ena_tx_ctx->l4_csum_enable << in ena_com_prepare_tx()464 desc->meta_ctrl |= (ena_tx_ctx->l4_csum_partial << in ena_com_prepare_tx()
112 uint32_t meta_ctrl; member490 return p->meta_ctrl & ENA_ETH_IO_TX_DESC_L3_PROTO_IDX_MASK; in get_ena_eth_io_tx_desc_l3_proto_idx()495 p->meta_ctrl |= val & ENA_ETH_IO_TX_DESC_L3_PROTO_IDX_MASK; in set_ena_eth_io_tx_desc_l3_proto_idx()500 return (p->meta_ctrl & ENA_ETH_IO_TX_DESC_DF_MASK) >> ENA_ETH_IO_TX_DESC_DF_SHIFT; in get_ena_eth_io_tx_desc_DF()505 p->meta_ctrl |= (val << ENA_ETH_IO_TX_DESC_DF_SHIFT) & ENA_ETH_IO_TX_DESC_DF_MASK; in set_ena_eth_io_tx_desc_DF()510 return (p->meta_ctrl & ENA_ETH_IO_TX_DESC_TSO_EN_MASK) >> ENA_ETH_IO_TX_DESC_TSO_EN_SHIFT; in get_ena_eth_io_tx_desc_tso_en()515 p->meta_ctrl |= (val << ENA_ETH_IO_TX_DESC_TSO_EN_SHIFT) & ENA_ETH_IO_TX_DESC_TSO_EN_MASK; in set_ena_eth_io_tx_desc_tso_en()530 return (p->meta_ctrl & ENA_ETH_IO_TX_DESC_L3_CSUM_EN_MASK) >> ENA_ETH_IO_TX_DESC_L3_CSUM_EN_SHIFT; in get_ena_eth_io_tx_desc_l3_csum_en()535 p->meta_ctrl |= (val << ENA_ETH_IO_TX_DESC_L3_CSUM_EN_SHIFT) & ENA_ETH_IO_TX_DESC_L3_CSUM_EN_MASK; in set_ena_eth_io_tx_desc_l3_csum_en()570 return (p->meta_ctrl & ENA_ETH_IO_TX_DESC_REQ_ID_LO_MASK) >> ENA_ETH_IO_TX_DESC_REQ_ID_LO_SHIFT; in get_ena_eth_io_tx_desc_req_id_lo()[all …]
85 uint32_t meta_ctrl; member91 uint32_t meta_ctrl; member
2385 uint32_t meta_ctrl; in al_eth_tx_pkt_prepare() local2502 tx_desc->tx_meta.meta_ctrl = swap32_to_le(meta_word_1); in al_eth_tx_pkt_prepare()2508 meta_ctrl = pkt->flags & AL_ETH_TX_PKT_META_FLAGS; in al_eth_tx_pkt_prepare()2518 meta_ctrl |= pkt->l3_proto_idx; in al_eth_tx_pkt_prepare()2519 meta_ctrl |= pkt->l4_proto_idx << AL_ETH_TX_L4_PROTO_IDX_SHIFT; in al_eth_tx_pkt_prepare()2520 meta_ctrl |= pkt->source_vlan_count << AL_ETH_TX_SRC_VLAN_CNT_SHIFT; in al_eth_tx_pkt_prepare()2521 meta_ctrl |= pkt->vlan_mod_add_count << AL_ETH_TX_VLAN_MOD_ADD_SHIFT; in al_eth_tx_pkt_prepare()2529 meta_ctrl |= AL_ETH_TX_FLAGS_ENCRYPT; in al_eth_tx_pkt_prepare()2532 meta_ctrl |= pkt->tunnel_mode << AL_ETH_TX_TUNNEL_MODE_SHIFT; in al_eth_tx_pkt_prepare()2534 meta_ctrl |= 1 << AL_ETH_TX_OUTER_L3_PROTO_SHIFT; in al_eth_tx_pkt_prepare()[all …]