| /freebsd-12.1/contrib/llvm/lib/CodeGen/ |
| H A D | LiveRegUnits.cpp | 55 } else if (O->isRegMask()) in stepBackward()
80 } else if (O->isRegMask()) in accumulate()
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| H A D | LivePhysRegs.cpp | 54 } else if (O->isRegMask()) in removeDefs()
103 } else if (O->isRegMask()) in stepForward()
113 if (Reg.second->isRegMask() && in stepForward()
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| H A D | RegUsageInfoPropagate.cpp | 72 if (MO.isRegMask()) in setRegMask()
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| H A D | DeadMachineInstructionElim.cpp | 151 } else if (MO.isRegMask()) { in runOnMachineFunction()
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| H A D | MachineCopyPropagation.cpp | 172 if (MO.isRegMask()) in findAvailCopy()
548 if (MO.isRegMask()) in CopyPropagateBlock()
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| H A D | CriticalAntiDepBreaker.cpp | 265 if (MO.isRegMask()) in ScanInstruction()
365 if (CheckOper.isRegMask() && CheckOper.clobbersPhysReg(NewReg)) in isNewRegClobberedByRefs()
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| H A D | MachineCSE.cpp | 216 if (MO.isRegMask() && MO.clobbersPhysReg(Reg)) in isPhysDefTriviallyDead()
355 if (MO.isRegMask()) in PhysRegDefsReach()
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| H A D | RegisterScavenging.cpp | 121 if (MO.isRegMask()) { in determineKillsAndDefs()
329 if (MO.isRegMask()) in findSurvivorReg()
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| H A D | MachineInstrBundle.cpp | 325 if (MO.isRegMask() && MO.clobbersPhysReg(Reg)) { in analyzePhysReg()
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| H A D | MachineInstr.cpp | 233 assert((isImpReg || Op.isRegMask() || MCID->isVariadic() || in addOperand()
984 if (isPhys && Overlap && MO.isRegMask() && MO.clobbersPhysReg(Reg)) in findRegisterDefOperandIdx()
1385 if ((MO.isReg() && MO.isImplicit()) || MO.isRegMask()) in copyImplicitOps()
1928 if (MO.isRegMask()) { in setPhysRegsDeadExcept()
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| H A D | ShrinkWrap.cpp | 285 } else if (MO.isRegMask()) { in INITIALIZE_PASS_DEPENDENCY()
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| H A D | ImplicitNullChecks.cpp | 233 auto IsRegMask = [](const MachineOperand &MO) { return MO.isRegMask(); }; in canHandle()
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| H A D | VirtRegMap.cpp | 514 if (MO.isRegMask()) in rewrite()
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| /freebsd-12.1/contrib/llvm/lib/Target/X86/ |
| H A D | X86VZeroUpper.cpp | 156 if (MI.isCall() && MO.isRegMask() && !clobbersAllYmmAndZmmRegs(MO)) in hasYmmOrZmmReg()
172 if (MO.isRegMask()) in callHasRegMask()
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| /freebsd-12.1/contrib/llvm/lib/CodeGen/AsmPrinter/ |
| H A D | DbgEntityHistoryCalculator.cpp | 187 } else if (MO.isRegMask()) { in collectChangingRegs()
228 } else if (MO.isRegMask()) { in calculateDbgEntityHistory()
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| /freebsd-12.1/contrib/llvm/include/llvm/CodeGen/ |
| H A D | MachineOperand.h | 335 bool isRegMask() const { return OpKind == MO_RegisterMask; } in isRegMask() function
615 assert(isRegMask() && "Wrong MachineOperand accessor"); in getRegMask()
683 assert(isRegMask() && "Wrong MachineOperand mutator"); in setRegMask()
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| H A D | LiveRegUnits.h | 53 if (O->isRegMask()) in accumulateUsedDefed()
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| /freebsd-12.1/contrib/llvm/lib/Target/Hexagon/ |
| H A D | HexagonVLIWPacketizer.cpp | 788 if (MO.isRegMask() && MO.clobbersPhysReg(DepReg)) in canPromoteToNewValueStore()
831 if (CheckDef && MO.isRegMask() && MO.clobbersPhysReg(DepReg)) in isImplicitDependency()
1269 if (!OpJ.isRegMask()) in hasRegMaskDependence()
1276 } else if (OpI.isRegMask()) { in hasRegMaskDependence()
1592 } else if (!Op.isRegMask()) { in isLegalToPacketizeTogether()
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| H A D | RDFDeadCode.cpp | 69 if (Op.isRegMask()) { in isLiveInstr()
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| H A D | RDFRegisters.cpp | 81 if (Op.isRegMask()) in PhysicalRegisterInfo()
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| H A D | HexagonBlockRanges.cpp | 352 if (!Op.isRegMask()) in computeInitialLiveRanges()
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| H A D | RDFGraph.cpp | 626 if (Op.isRegMask()) in isClobbering()
993 assert(Op.isReg() || Op.isRegMask()); in makeRegRef()
1339 if (!Op.isRegMask()) in buildStmt()
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| /freebsd-12.1/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64A57FPLoadBalancing.cpp | 562 } else if (U.isRegMask()) { in colorChain()
698 } else if (MO.isRegMask()) { in maybeKillChain()
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| H A D | AArch64CollectLOH.cpp | 462 if (MO.isRegMask()) { in handleNormalInst()
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| /freebsd-12.1/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCCTRLoops.cpp | 698 } else if (MO.isRegMask()) { in clobbersCTR()
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