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Searched refs:isInConsecutiveRegs (Results 1 – 5 of 5) sorted by relevance

/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/
H A DTargetCallingConv.h102 bool isInConsecutiveRegs() const { return IsInConsecutiveRegs; } in isInConsecutiveRegs() function
/freebsd-12.1/contrib/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp640 if (Out.Flags.isInConsecutiveRegs()) in LowerCall()
736 if (In.Flags.isInConsecutiveRegs()) in LowerCall()
788 if (Out.Flags.isInConsecutiveRegs()) in LowerReturn()
816 if (In.Flags.isInConsecutiveRegs()) in LowerFormalArguments()
/freebsd-12.1/contrib/llvm/include/llvm/Target/
H A DTargetCallingConv.td57 class CCIfConsecutiveRegs<CCAction A> : CCIf<"ArgFlags.isInConsecutiveRegs()", A> {
/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp3266 if (!Flags.isInConsecutiveRegs()) in CalculateStackSlotSize()
3303 if (Flags.isInConsecutiveRegs()) { in CalculateStackSlotAlignment()
3948 ArgSize = Flags.isInConsecutiveRegs() ? ObjSize : PtrByteSize; in LowerFormalArguments_64SVR4()
6002 } else if (!Flags.isInConsecutiveRegs()) { in LowerCall_64SVR4()
6038 !isLittleEndian && !Flags.isInConsecutiveRegs()) { in LowerCall_64SVR4()
6056 Flags.isInConsecutiveRegs()) ? 4 : 8; in LowerCall_64SVR4()
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp3132 !Ins[i].Flags.isInConsecutiveRegs()) in LowerFormalArguments()
3725 !Flags.isInConsecutiveRegs()) { in LowerCall()